TQ8101C Datasheet, PDF (1/14 Pages) TriQuint Semiconductor – 622/155 Mb/s SONET/SDH MDFP

TRIQUINT
S E M I C O N D U C T O R, I N C .
TQ8101C
The TQ8101C is a SONET/SDH transceiver that integrates Multiplexing,
Demultiplexing, SONET/SDH Framing, clock synthesis PLL (MDFP), and
loopback functions in a single monolithic integrated circuit. Implementation
with the TQ8101C requires only a simple external RC loop filter and standard
TTL and ECL power supplies. For optimal performance, the TQ8101C MDFP
is packaged in a 68-pin multilayer ceramic (MLC) surface-mount package
with an integral CuW heat spreader. The TQ8101C provides an integrated
solution for physical interfaces intended for use in STS-12/STM-4
(622.08-Mb/s) and STS-3/STM-1 (155.52-Mb/s) SONET/SDH systems.
The TQ8101C meets ANSI, Bellcore, and ITU requirements for a SONET/
SDH device. With a 51.84-MHz reference clock, the phase-locked loop
(PLL) provides 77.76-MHz or 19.44-MHz output for the multiplexer and
77.76-MHz or 19.44-MHz and 51.84-MHz output for the demultiplexer.
Typical SONET/SDH system applications for the TQ8101C include:
• Transmission system transport cards
• Switch and cross-connect line cards
• Repeaters
• ATM physical layer interfaces
• Test equipment
• Add/drop multiplexers
Figure 1. Logical Application
PM5312
STTX
or
PM5355
S/UNI-622
TOUT(7:0) 8-bit data
TQ8101C
MDFP
MXDT(7:0)
RIN(7:0)
OHFP
OOF
TCLK
RIFP
RICLK
8-bit data
OOF fix*
DXDT(7:0)
OOF
MXCK0
DXSYNC
DXCK
600 Ω
0.68 µF
V_EE
Driver
and
LASER _{OC-3 or OC-12}
O/E Rx +
TQ8103
CDR _{OC-3 or OC-12}
CNTL(3:0)
*Contact PMC-Sierra for
application note.
51.84 MHz
CMOS OSC
622/155 Mb/s
SONET/SDH MDFP
Features
• Byte-wide Multiplexing,
Demultiplexing, Framing, and
PLL (MDFP) in one device
• Choice of STS-12/STM-4 or
STS-3/STM-1 transmission rates
• Configurable master or slave
reference clock generation and
PLL bypass for external clocking
• 77.76 MHz or 19.44 MHz output
for the multiplexer; 77.76 MHz or
19.44 MHz and 51.84 MHz
output for the demultiplexer
• External RC loop filter
• Pass-through mode and three
loopback modes for enhanced
filed diagnostics
• Frame-synchronous and byte-
aligned demultiplexer output,
compliant with SONET and SDH
• Search, detect, and recovery of
framing on out-of-frame input
• Standard TTL and differential or
single-ended ECL I/O (except TXCK)
• Tristate TTL output for factory
circuit-board testability
• 68-pin TriQuint MLC controlled-Z
surface-mount package with
integral heat spreader
• Dual-supply operation (+5V, –5.2V)
• Low power dissipation (2.3W nom.)
For additional information and latest specifications, see our website: www.triquint.com
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