GA1085 Datasheet, PDF (1/10 Pages) TriQuint Semiconductor – 11-Output Configurable Clock Buffer

TRIQUINT
S E M I C O N D U C T O R, I N C .
Figure 1. Block Diagram
GA1085
FBIN S1 REFCLK S0 F1
11 10 9
8
7
F0 GND
6
5
TEST 12
VDD 13
Q0 ¹⁴
GND 15
Q1 16
Q2 ¹⁷
VDD 18
Phase
Detector
VCO
Phase
Select
MUX
Divide Logic
÷4, ÷5, or ÷6
Group
B
Output Buffers
Group
C
Group A
4 VDD
3 Q10
2 _Q9
1 GND
28 Q8
27 Q7
26 VDD
19 20
GND Q3
21 22 23
Q4 VDD Q5
24 25
Q6 GND
TriQuint’s GA1085 is a configurable clock buffer which generates 11 outputs
and operates over a wide range of frequencies—from 24 MHz to 105 MHz.
The outputs are available at either 1x and 2x or at 1x and ¹/₂ x the reference
clock frequency, f_REF. When one of the Group A outputs (Q4–Q8) is used as
feedback to the PLL, all Group A outputs will be at f_REF , and all Group B
(Q0–Q3) and Group C (Q9, Q10) outputs will be at ¹/₂ x f_REF . When one of
the Group B outputs is used as feedback to the PLL, all Group A outputs
will be at 2x _REF and all Group B and Group C outputs will be at f_REF . The
Shift Select pins select the phase shift (–2t, –t, +t or +2t) for Group C
outputs (Q9, Q10) with respect to REFCLK. The phase shift increment (t)
is equivalent to the VCO’s period (1/f_VCO).
A very stable internal Phase-Locked Loop (PLL) provides low-jitter operation.
This completely self-contained PLL requires no external capacitors or resistors.
The PLL’s Voltage-Controlled Oscillator (VCO) has a frequency range from
280 MHz to 420 MHz. By feeding back one of the output clocks to FBIN,
the PLL continuously maintains frequency and phase synchron-ization
between the reference clock (REFCLK) and each of the outputs.
11-Output
Configurable
Clock Buffer
Features
• Wide frequency range:
24 MHz to 105 MHz
• Output configurations:
Four outputs at f_REF
Four outputs at f_REF /2
Two outputs at f_REF /2
␣ ␣ ␣ ␣ with adjustable phase
␣ ␣ ␣ ␣ ␣ ␣ ␣ ␣ ␣ ␣ ␣ or
Five outputs at 2x f_REF
Three outputs at f_REF
Two outputs at f_REF
␣ ␣ ␣ ␣ with adjustable phase
• Selectable Phase Shift: –2t, –t,
+t, and +2t (t = 1/f_VCO)
• Low output-to-output skew: 150
ps (max) within a group
• Near-zero propagation delay:
–350 ps +1000 ps (max)
• TTL-compatible with 30 mA
output drive
• 28-pin J-lead surface-mount
package
TriQuint’s patented output buffer design delivers a very low output-to-output
skew of 150 ps (max). The GA1085’s symmetrical TTL outputs are capable
of sourcing and sinking 30 mA.
For additional information and latest specifications, see our website: www.triquint.com
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