TA0105A Datasheet, PDF (13/29 Pages) Tripath Technology Inc. – STEREO CLASS-T DIGITAL AUDIO AMPLIFIER DRIVER USING DIGITAL POWER PROCESSING (DPPTM ) TECHNOLOGY

Tripath Technology, Inc. - Technical Information
Application Information
Figure 1 is a simplified diagram of one channel (Channel 1) of a TA0105A amplifier to assist in
understanding its operation.
BBM0 7
BBM1 8
C_I
+
R_{I IN1 6}
Offset Trim
V5 ^Circuit
R_OFA
R_OFB
R_OFB
C_OF
5V
MUTE 4
OVER
CURRENT
DETECTION
16 OCS1HP
15 OCS1HN
R_S
C_S
VPP
+
C_S
V5
-
+
AGND
22 HO1
R_G
Q_O
21 HO1COM
C_HBR
0.1uF
L_O
2.5V
Processing
&
Modulation
VN12
20 LO1
17 LO1COM
13 OCS1LP
R_G
Q_O
C_O
R_Z
C_Z
R_L
OVER
R_S
CURRENT
14 OCS1LN
DETECTION
VNN
C_S
C_S
V5
11 OCR1
R_OCR
18 FDBKN1
R_FB
9 GNDKELVIN1
C_FB
R_FB
AGND
VPP 23
VNN 24
VN12 19
5V
C_S
V5 3
OVER/
UNDER
VOLTAGE
DETECTION
1
AGND
28
PGND
37 VHIGH
38 VLOW
C_VB
AGND
C_VB
AGND
35 HMUTE
2 OVERLOADB
Figure 1: Simplified TA0105A Amplifier
TA0105A BASIC AMPLIFIER OPERATION
The audio input signal is fed to the processor internal to the TA0105A, where a switching pattern is
generated. The average idle (no input) switching frequency is approximately 700kHz and can be adjusted
by changing the C_FB value. The idle switching frequency must be maintained above 550kHz to ensure
proper device operation. With an input signal, the pattern is spread spectrum and varies between
approximately 200kHz and 1.5MHz depending on input signal level and frequency. Complementary
copies of the switching pattern are level-shifted by the MOSFET drivers and output from the TA0105A
where they drive the gates (HO1 and LO1) of external power MOSFETs that are connected as a half
bridge. The output of the half bridge is a power-amplified version of the switching pattern that switches
between VPP and VNN. This signal is then low-pass filtered to obtain an amplified reproduction of the
audio input signal.
The processor portion of the TA0105A is operated from a 5-volt supply. In the generation of the switching
patterns for the output MOSFETs, the processor inserts a “break-before-make” dead time between the
turn-off of one transistor and the turn-on of the other in order to minimize shoot-through currents in the
MOSFETs. The dead time can be programmed by setting the break-before-make control bits, BBM1 and
BBM0. Feedback information from the output of the half-bridge is supplied to the processor via
FBKOUT1. Additional feedback information to account for ground bounce is supplied via FBKGND1.
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TA0105A – RW/ Rev. 2.2/05.05