TMP86CS25AFG Datasheet, PDF (96/194 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

9. 8-Bit TimerCounter (TC3, TC4)
9.1 Configuration
TMP86CS25AFG
The TimerCounter 4 is controlled by the TimerCounter 4 control register (TC4CR) and two 8-bit timer registers
(TTREG4 and PWREG4).
TimerCounter 4 Timer Register
TTREG4
7
6
5
4
3
2
1
0
(001DH)
R/W
(Initial value: 1111 1111)
PWREG4
7
6
5
4
3
2
1
0
(002DH)
R/W
(Initial value: 1111 1111)
Note 1: Do not change the timer register (TTREG4) setting while the timer is running.
Note 2: Do not change the timer register (PWREG4) setting in the operating mode except the 8-bit and 16-bit PWM modes while
the timer is running.
TimerCounter 4 Control Register
TC4CR
7
6
5
4
3
2
1
0
(0019H) _TFF4
TC4CK
TC4S
TC4M
(Initial value: 0000 0000)
0: Clear
TFF4 Timer F/F4 control
R/W
1: Set
NORMAL1/2, IDLE1/2 mode
DV7CK = 0
DV7CK = 1
SLOW1/2
SLEEP1/2
mode
000
fc/2¹¹
fs/2³
fs/2³
001
fc/2⁷
fc/2⁷
–
010
TC4CK Operating clock selection [Hz]
011
fc/2⁵
fc/2³
fc/2⁵
fc/2³
–
R/W
–
100
fs
fs
fs
101
fc/2
fc/2
–
110
fc
fc
–
111
TC4 pin input
0: Operation stop and counter clear
TC4S TC4 start control
R/W
1: Operation start
000: _{8-bit timer/event counter mode}
001: _{8-bit programmable divider output (PDO) mode}
010: 8-bit pulse width modulation (PWM) output mode
011: Reserved
TC4M TC4M operating mode select
R/W
100: 16-bit timer/event counter mode
101: Warm-up counter mode
110: ^{16-bit pulse width modulation (PWM) output mode}
111: ^{16-bit PPG mode}
Note 1: fc: High-frequency clock [Hz] fs: Low-frequency clock [Hz]
Note 2: Do not change the TC4M, TC4CK and TFF4 settings while the timer is running.
Note 3: To stop the timer operation (TC4S= 1 → 0), do not change the TC4M, TC4CK and TFF4 settings.
To start the timer operation (TC4S= 0 → 1), TC4M, TC4CK and TFF4 can be programmed.
Note 4: When TC4M= 1** (upper byte in the 16-bit mode), the source clock becomes the TC4 overflow signal regardless of the
TC3CK setting.
Note 5: To use the TimerCounter in the 16-bit mode, select the operating mode by programming TC4M, where TC3CR<TC3 M>
must be set to 011.
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