TC74VHC299F_07 Datasheet, PDF (8/12 Pages) Toshiba Semiconductor – 8-Bit Pipo Shift Register with Asynchronous Clear

Timing Requirements (input: t_r = t_f = 3 ns)
Characteristics
Symbol
Minimum pulse width
(CK)
Minimum pulse width
( CLR )
Minimum set-up time
(SL, SR)
Minimum set-up time
(A to H)
Minimum set-up time
(S0, S1)
Minimum hold time
(SL, SR)
Minimum hold time
(A to H)
Minimum hold time
(S0, S1)
Minimum removal time
( CLR )
t_{w (H)}
t_{w (L)}
t_{w (L)}
t_s
t_s
t_s
t_h
t_h
t_h
t_rem
TC74VHC299F/FT
Test Condition
―
―
―
―
―
―
―
―
―
Ta = 25°C
Ta =
−40 to
85°C ^Unit
V_CC (V) Typ. Limit Limit
3.3 ± 0.3 ―
7.0
8.0
ns
5.0 ± 0.5 ―
7.0
8.0
3.3 ± 0.3 ―
6.0
7.0
ns
5.0 ± 0.5 ―
6.0
7.0
3.3 ± 0.3 ―
5.0 ± 0.5 ―
8.5 10.0
ns
5.0 5.0
3.3 ± 0.3 ―
8.0
9.0
ns
5.0 ± 0.5 ―
4.0
4.0
3.3 ± 0.3 ― 14.5 17.0
ns
5.0 ± 0.5 ―
7.0
8.0
3.3 ± 0.3 ―
1.0 1.0
ns
5.0 ± 0.5 ―
1.0 1.0
3.3 ± 0.3 ―
0.5 0.5
ns
5.0 ± 0.5 ―
1.5 1.5
3.3 ± 0.3 ―
0
0
ns
5.0 ± 0.5 ―
0.5 0.5
3.3 ± 0.3 ―
5.0
6.0
ns
5.0 ± 0.5 ―
4.0
4.0
Noise Characteristics (input: t_r = t_f = 3 ns)
Characteristics
Symbol
Quiet output maximum dynamic
V_OL
Quiet output minimum dynamic
V_OL
Minimum high level dynamic input
Voltage
Maximum low high level dynamic
input Voltage
V_OLP
C_L = 50 pF
V_OLV
C_L = 50 pF
V_IHD
V_ILD
C_L = 50 pF
C_L = 50 pF
Test Condition
Ta = 25°C
Unit
V_CC (V) Typ. Limit
5.0
0.9 1.2
V
5.0
−0.9 −1.2
V
5.0
―
3.5
V
5.0
―
1.5
V
8
2007-10-01