TMP88CS43FG Datasheet, PDF (63/218 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

TMP88CS43FG
5.8 Port P7 (P77 to P70)
Port P7 is an 8-bit input/output port shared with AD converter analog input. This port is switched between input
and output modes using the P7 port input/output control register (P7CR), P7 port output latch (P7DR), and ADC-
CRA<AINDS>. When reset, the P7CR register and the P7DR output latch are initialized to 0 while ADC-
CRA<AINDS> is set to 1, so that P77 to P70 have their inputs fixed low (= 0). When using the P7 port as an input
port, set the corresponding bits for input mode (P7CR = 0, P7DR = 1). The reason why the output latch = 1 is
because it is necessary to prevent current from flowing into the shared data input circuit. When using the port as an
output port, set the P7CR Register's corresponding bits to 1. When using the port for analog input, set the corre-
sponding bits for analog input (P7CR = 0, P7DR = 0). Then set ADCCRA<AINDS> = 0, and AD conversion will
start.
The ports used for analog input must have their output latches set to 0 beforehand. The actual input channels for
AD conversion are selected using ADCCRA<SAIN>.
Although the bits of P7 port not used for analog input can be used as input/output ports, do not execute output
instructions on these ports during AD conversion. This is necessary to maintain the accuracy of AD conversion.
Also, do not apply rapidly changing signals to ports adjacent to analog input during AD conversion.
If an input instruction is executed while the P7DR output latch is cleared to 0, data “0” is read in from said bits.
Analog input
AINDS
SAIN
P7CRi
DQ
P7CRi input
Data input (P7)
Data output (P7)
STOP
DQ
P7i
Note 1: i = 7 to 0
Note 2: STOP exists in SYSCR1 register bit 7.
Note 3: SAIN selects AD input channels.
Figure 5-9 Port P7
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