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| TMP86P203PG Datasheet, PDF (59/108 Pages) Toshiba Semiconductor – 8 Bit Microcontroller | |||
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TMP86P203PG
6.3.4 Address Trap Reset
While WDTCR1<ATOUT> is â1â, if the CPU should start looping for some cause such as noise and attempt
be made to fetch an instruction from the on-chip RAM (while WDTCR1<ATAS> is â1â) or the SFR area,
address trap reset will be generated. When an address trap reset request is generated, the internal hardware is
reset. The reset time is maximum 24/fc [s] (9.6 µs @ fc = 2.5 MHz).
Page 51
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