TMP86C846NG Datasheet, PDF (59/160 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

TMP86C846NG
5.4 Port P3 (P37 to P30)
Port P3 is an 8-bit input/output port which can be configured as an input or an output in one-bit unit under software
control. Port P3 is also used as an analog input, key on wake up input. Input/output mode is specified by the corre-
sponding bit in the port P3 input/output control register (P3CR), and ADCCR1<AINDS>. During reset, P3CR are
initialized to “0” and ADCCR1<AINDS> is set to “1”, therefore port P3 is configured as an input.
When used as an analog input, set an analog input channel to ADCCR1<SAIN> and clear ADCCR1<AINDS> to
“0”. When ADCCR1<AINDS> is “0”, the pin which is specified as an analog input is used as analog input indepen-
dent on the value of P3CR and P3DR.
When used as an input port or key on wake up input, the corresponding bit of P3CR is cleared to “0” without spec-
ifying as an analog input.
When the AD converter is enabled (ADCCR1<AINDS> is “0”), the data of port which is selected as an analog
input is read “0”. and the data of port which is not selected as an analog input is read “0” or “1”, depend on the volt-
age level.
When used as an output port, the corresponding bit of P3CR is set to “1” without specifying as an analog input.
Data can be written into the output latch regardless of P3CR contents, therefore initial output data should be written
into the output latch before setting P3CR.
The pins not used as analog input can be used as an input/output port. But output instructions should not be exe-
cuted to keep a precision. In addition, a variable signal should not be input to an adjacent port to the analog input
during AD conversion.
STOPj
Key on wake up
Analog input
STOP
OUTEN
AINDS
SAIN
P3CRi
P3CRi input
Data input (P3DR)
DQ
Output latch
Data output (P3DR)
DQ
Output latch
Figure 5-5 Port P3
P3i
Note: i = 7 to 0
j = 5 to 2
P3DR
(0003H)
R/W
7
P37
AIN7
STOP5
6
P36
AIN6
STOP4
5
P35
AIN5
STOP3
4
P34
AIN4
STOP2
3
P33
AIN3
2
P32
AIN2
1
P31
AIN1
0
P30
AIN0
(Initial value: 0000 0000)
P3CR
7
6
5
4
3
2
1
0
(000EH)
(Initial value: 0000 0000)
I/O control
0: Input mode
P3CR
R/W
(Specified for each bit)
1: Output mode
Note: Ports set to the input mode read the pin states. Ports set to the output mode read the output latch. When input pin and out-
put pin exist in port P3 together, the contents of the output latch which is specified as an input mode may be rewritten by
executing the bit manipulation instructions.
Page 51