TMP93CW46A Datasheet, PDF (54/242 Pages) Toshiba Semiconductor – CMOS 16-Bit Microcontroller

TMP93CW46A
Figure 3.5.1 shows the example of the external interface circuit the case of the bus
releasing function is used.
When the bus is released, both internal memory and internal I/O can not be accessed.
But the internal I/O continues to operate.
So, the watchdog timer also continues to run. Therefore, be careful about bus
releasing time and setting the detection time of the WDT.
P35 ( BUSAK )
P42 ( CS2 )
P30 ( RD )
P31 ( WR )
P32 ( HWR )
P36 ( R / W )
P37 ( RAS )
P40 ( CS0 )
P41 ( CS1 )
About 3 to 5 kΩ
System control bus
P20 (A16)
to
P27 (A23)
Address bus (A23 to A16)
Figure 3.5.1 Example of the Interface Circuit (The case of using bus releasing function)
The above circuit is necessary to fix the signal level in the case of the bus is released.
Resetting sets P30 ( RD ), P31 ( WR ) to output, P40 ( CS0 ), P41 ( CS1 ), P32 ( HWR ),
P36 ( R / W ), P37 ( RAS ), and P35 ( BUSAK ) to input with pull-up resistor, P42 ( CS2 )
and P20 to P27 (A16 to A23) to input with pull-down resistor.
The above circuit is necessary to fix the signal level after reset because of the
external pull-up resistor collisions with the internal pull-down resistor.
The value of this external pull-up resistor must be 3 to 5 kΩ. (The value of the
internal pull-down resistor is about 50 to 150 kΩ.) P20 to P27 (A16 to A23) also needs
circuit like P42 ( CS2 ) to fix the signal level.
But for the P20 to P27 (A16 to A23) which does not have means “L” is active, add
pull-down directly like above circuit.
93CW46A-52
2004-02-10