TMP86C847UG Datasheet, PDF (51/160 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

TMP86C847UG
External Interrupt Control Register
EINTCR
(0037H)
7
INT1NC
6
INT0EN
5
4
INT4ES
3
INT3ES
2
INT2ES
1
INT1ES
0
(Initial value: 0000 000*)
0: Pulses of less than 63/fc [s] are eliminated as noise
INT1NC
Noise reject time select
R/W
1: Pulses of less than 15/fc [s] are eliminated as noise
0: P00 input/output port
INT0EN
P00/INT0 pin configuration
R/W
1: INT0 pin (Port P00 should be set to an input mode)
00: Rising edge
01: Falling edge
INT4 ES
INT4 edge select
R/W
10: Rising edge and Falling edge
11: H level
0: Rising edge
INT3 ES
INT3 edge select
R/W
1: Falling edge
0: Rising edge
INT2 ES
INT2 edge select
R/W
1: Falling edge
0: Rising edge
INT1 ES
INT1 edge select
R/W
1: Falling edge
Note 1: fc: High-frequency clock [Hz], *: Don’t care
Note 2: When the system clock frequency is switched between high and low or when the external interrupt control register
(EINTCR) is overwritten, the noise canceller may not operate normally. It is recommended that external interrupts are dis-
abled using the interrupt enable register (EIR).
Note 3: The maximum time from modifying INT1NC until a noise reject time is changed is 2⁶/fc.
Note 4: In case RESET pin is released while the state of INT4 pin keeps "H" level, the external interrupt 4 request is not generated
even if the INT4 edge select is specified as "H" level. The rising edge is needed after RESET pin is released.
Page 43