TC9495F Datasheet, PDF (5/17 Pages) Toshiba Semiconductor – Digital Servo Single Chip Processor Built in 1 Bit DA Converter

TC9495F
Pin No.
Symbol
55
DMO
56
2V_REF
57
SEL
58
FLGA
59
FLGB
60
FLGC
61
FLGD
62
V_DD
63
V_SS
64
IO0
65
IO1
66
IO2
67
IO3
68
DMOUT
69
CKSE
70
DACT
71
TESIN
72
TESIO1
73
V_SS
74
PXI
75
PXO
76
V_DD
77
XV_SS
78
XI
79
XO
80
XV_DD
81
DV_SR
82
RO
83
DV_DD
84
DVR
85
LO
86
DV_SL
87
TEST1
I/O
Functional Description
Disk equalizer output terminal.
O
(PWM carrier = 88.2 kHz for DSP, Synchronize to PXO)
¾ Analog double reference voltage supply terminal.
APC circuit ON/OFF indication signal output terminal.
O _{At the laser on time, UHF = L at “HiZ” level and UHF = H at}
“H” level.
Extemal flag output terminal for internal signal.
O _{Can select signal from TEZC, FOON , FOK and RFZC by}
command.
Extemal flag output terminal for internal signal.
O _{Can select signal from DFCT , FOON , FMON and RFZC}
by command.
Extemal flag output terminal for internal signal.
O _{Can select signal from TRON , TRSR , FOK and SRCH}
by command.
Extemal flag output terminal for internal signal.
O _{Can select signal from TRON , DMON , HYS and SHC}
by command.
¾ Digital power supply voltage terminal.
¾ Digital GND terminal.
Remarks
¾
¾
¾
¾
¾
¾
¾
¾
¾
General I/O terminal. Can change over input port or output
I/O
port by command. At the input mode time can readout a
state of terminal (H/L) by read command. At the output mode
¾
time can control a state of terminal (H/L/HiZ) by command.
This terminal controls IO0~IO3 terminal.
I _{At “L” level time, IO0, 1 out feed equalizer signal of 2-state} With pull-up resistor.
PWM, IO2, 3 out disk equalizer signal of 2-state PWM.
I Normally, keep at open.
With pull-up resistor.
I DAC test mode terminal. Normally, keep at open.
With pull-up resistor.
I Test input terminal. Normally, keep at “L” level.
Analog input.
I Test input/output terminal. Normally, keep at “L” level.
¾
¾ Digital GND terminal.
¾
Crystal oscillator connecting input terminal for DSP.
I
Normally, keep at “L” level.
Analog input.
O Crystal oscillator connecting output terminal for DSP.
¾ Digital power supply voltage terminal.
¾
¾ Oscillator GND terminal for system clock.
¾
I Crystal oscillator connecting input terminal for system clock.
¾
O Crystal oscillator connecting output terminal for system clock.
¾
¾ Oscillator power supply voltage terminal for system clock.
¾
¾ Analog GND terminal for DA converter. (R-ch)
¾
O R channel data forward output terminal.
¾
¾ Analog supply voltage terminal for DA converter.
¾
¾ Reference voltage terminal for DA converter.
¾
O L channel data forward output terminal.
¾
¾ Analog GND terminal for DA converter. (L-ch)
¾
I Test mode terminal. Normal, keep at open.
With pull-up resistor.
5
2002-01-11