TC4520BP_07 Datasheet, PDF (5/11 Pages) Toshiba Semiconductor – Dual Binary Up Counter

TC4520BP/BF/BFN
Dynamic Electrical Characteristics (Ta = 25°C, V_SS = 0 V, C_L = 50 pF)
Characteristics
Output transition time
(low to high)
Output transition time
(high to low)
Propagation delay time
(CLOCK, ENABLE-Q)
Propagation delay time
(RESET-Q)
Max clock frequency
Max clock input rise/fall time
Max input rise/fall time
(ENABLE)
Min clock pulse width
Min pulse width
(ENABLE)
Min pulse width
(RESET)
Min removal time
(RESET-CLOCK, ENABLE)
Input capacitance
Symbol
t_TLH
t_THL
t_pLH
t_pHL
t_pHL
t_CL
t_rCL
t_fCL
t_r
t_f
t_W
t_W
t_WH
t_rem
C_IN
Test Condition
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
V_DD (V)
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
Min Typ. Max
⎯
70 200
⎯
35 100
⎯
30
80
⎯
70 200
⎯
35 100
⎯
30
80
⎯ 160 560
⎯
75 230
⎯
60 160
⎯ 110 560
⎯
55 230
⎯
40 160
1.5
6
⎯
3
14
⎯
4
18
⎯
No limit
No limit
⎯
30 200
⎯
15 100
⎯
10
70
⎯
35 250
⎯
20 110
⎯
15
80
⎯
45 250
⎯
20 110
⎯
15
80
⎯
⎯
0
⎯
⎯
0
⎯
⎯
0
⎯
5
7.5
Unit
ns
ns
ns
ns
MHz
μs
μs
ns
ns
ns
ns
pF
5
2007-10-01