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TC4017BP_07 Datasheet, PDF (5/9 Pages) Toshiba Semiconductor – Decade Counter/Divider
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TC4017BP/BF
Dynamic Electrical Characteristics (Ta = 25°C, VSS = 0 V, CL = 50 pF)
Characteristics
Output transition time
(low to high)
Output transition time
(high to low)
Propagation delay time
(CLOCK-Qn)
Propagation delay time
(CLOCK-CARRY OUT)
Propagation delay time
RESET-Qn
RESET-CARRY OUT
Max clock frequency
Min clock pulse width
Min pulse width
(RESET)
Max clock rise time
Max clock fall time
Min set-up time
(CLOCK INHIBIT-CLOCK)
Min removal time
(RESET-CLOCK)
Input capacitance
Symbol
tTLH
tTHL
tpLH
tpHL
tpLH
tpHL
tpLH
tpHL
fCL
tW
tWH
trCL
tfCL
tSU
trem
CIN
Test Condition
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
VDD (V)
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
Min Typ. Max
⎯
80 200
⎯
50 100
⎯
40
80
⎯
80 200
⎯
50 100
⎯
40
80
⎯ 325 650
⎯ 135 270
⎯
85 170
⎯ 280 600
⎯ 110 250
⎯
75 160
⎯ 265 530
⎯ 115 230
⎯
85 170
2.5 6.0
⎯
5.0 12.0 ⎯
6.7 13.5 ⎯
⎯
85 200
⎯
40
90
⎯
35
60
⎯
50 260
⎯
20 110
⎯
15
60
No limit
⎯
30 230
⎯
15 100
⎯
10
70
⎯
−55 400
⎯
−20 275
⎯
−15 150
⎯
5
7.5
Unit
ns
ns
ns
ns
ns
MHz
ns
ns
μs
ns
ns
pF
5
2007-10-01
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