TLP2530_07 Datasheet, PDF (4/8 Pages) Toshiba Semiconductor – Digital Logic Isolation

TLP2530,TLP2531
Switching Characteristics (unless otherwise specified, Ta = 25°C, V_CC = 5V, I_F = 16mA)
Characteristic
Test
Symbol
Cir−
cuit
Test Condition
Min. Typ. Max. Unit
Propagation delay
time to logic low
at output
(each channel)
TLP2530
t_pHL
TLP2531
R_L = 4.1kΩ
1
R_L = 1.9kΩ
―
0.3
1.5
μs
―
0.2
0.8
Propagation delay
time to logic
high at output
(each channel)
TLP2530
TLP2531
Common mode
transient
immunity at logic
high level output
(each channel,
Note 9)
TLP2530
TLP2531
Common mode
transient
TLP2530
immunity at logic
low level output
(each channel,
Note 9)
TLP2531
Bandwidth
(each channel, Note 10)
t_pLH
CM_H
CM_L
BW
R_L = 4.1kΩ
1
R_L = 1.9kΩ
I_F = 0mA, V_CM = 400V_p−p
R_L = 4.1kΩ
2
I_F = 0mA, V_CM = 400V_p−p
R_L = 1.9kΩ
V_CM = 400V_p−p
R_L = 4.1kΩ, I_F = 16mA
2
V_CM = 400_p−p
R_L = 1.9kΩ, I_F = 16mA
3 R_L = 100Ω
―
0.5
1.5
μs
―
0.3
0.8
― 1500 ―
V / μs
― 1500 ―
― −1500 ―
V / μs
― −1500 ―
―
2
― MH_Z
(Note 6) DC current transfer ratio is defined as the ratio of output collector current, I_O, to the forward LED
input current_, I_F, times 100%.
(Note 7) Device considered a two−terminal device: Pins 1, 2, 3 and 4 shorted together and pins 5, 6, 7, and
8 shorted together.
(Note 8) Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
(Note 9) Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm / dt
on the leading egde of the common mode pulse, Vcm, to assure that the output will remain in a
logic high state(i.e., V_O > 2.0V).
Common mode transient immunity in logic low Level is the maximum tolerable (negative) dVcm / dt
on the trailing edge of the common mode pulse signal, Vcm, to assure that the output will remain in
logic low state(i.e., V_O > 0.8V).
(Note 10) The frequency at which the ac output voltage is 3dB below the low frequency asymptote.
4
2007-10-01