TC4024BP_07 Datasheet, PDF (4/9 Pages) Toshiba Semiconductor – 7 Stage Ripple-Carry Binary Counter/Dividers

TC4024BP/BF/BFN
Dynamic Electrical Characteristics (Ta = 25°C, V_SS = 0 V, C_L = 50 pF)
Characteristics
Output transition time
(low to high)
Output transition time
(high to low)
Propagation delay time
( CLOCK -Q1)
Propagation delay time
( CLOCK -Q1)
Propagation delay time
( CLOCK -Q7)
Propagation delay time
( CLOCK -Q7)
Propagation delay time
(RESET-Q)
Max clock frequency
Max clock input rise time
Max clock input fall time
Max clock pulse width
Max pulse width
(RESET)
Minimum removal time
Input capacitance
Symbol
t_TLH
t_THL
t_pLH
t_pHL
t_pLH
t_pHL
t_pHL
f_CL
t_rCL
t_fCL
t_W
t_WH
t_rem
C_IN
Test Condition
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
V_DD (V)
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
Min Typ. Max
⎯
70 200
⎯
35 100
⎯
30
80
⎯
70 200
⎯
35 100
⎯
30
80
⎯ 140 360
⎯
70 160
⎯
50 130
⎯ 140 360
⎯
70 160
⎯
50 130
⎯ 400 1200
⎯ 160 520
⎯ 115 430
⎯ 400 1200
⎯ 160 520
⎯ 115 430
⎯ 140 280
⎯
70 120
⎯
50 100
3.5
14
⎯
8.0
30
⎯
12.0 40
⎯
No limit
⎯
40 140
⎯
20
60
⎯
15
40
⎯
40 200
⎯
20
80
⎯
15
60
⎯
0
350
⎯
0
150
⎯
0
100
⎯
5
7.5
Unit
ns
ns
ns
ns
ns
ns
ns
MHz
μs
ns
ns
ns
pF
4
2007-10-01