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TC4013BF_12 Datasheet, PDF (4/8 Pages) Toshiba Semiconductor – TC4013B Dual D-Type Flip Flop
TC4013BP/BF
Dynamic Electrical Characteristics (Ta = 25°C, VSS = 0 V, CL = 50 pF)
Characteristics
Output transition time
(low to high)
Output transition time
(high to low)
Propagation delay time
(CK-Q, Q )
Propagation delay time
(SET, RESET-Q, Q )
Propagation delay time
(SET, RESET-Q, Q )
Max clock frequency
Max clock input rise time
Max clock input fall time
Min pulse width
(SET, RESET)
Min clock pulse width
Min set-up time
(DATA-CK)
Min hold time
(DATA-CK)
Min removal time
(SET, RESET-CK)
Input capacitance
Symbol
tTLH
tTHL
tpLH
tpHL
tpLH
tpHL
fCL
trCL
tfCL
tW
tW
tsu
tH
trem
CIN
Test Condition
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
VDD (V)
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
Min Typ. Max
⎯
70 200
⎯
35 100
⎯
30
80
⎯
70 200
⎯
35 100
⎯
30
80
⎯ 130 300
⎯
65 130
⎯
50
90
⎯ 110 300
⎯
50 130
⎯
40
90
⎯ 110 300
⎯
50 130
⎯
40
90
3.5
8
⎯
8.0
16
⎯
12.0 20
⎯
No limit
⎯
60 180
⎯
30
80
⎯
25
50
⎯
60 140
⎯
30
60
⎯
25
40
⎯
⎯
40
⎯
⎯
20
⎯
⎯
15
⎯
20
40
⎯
10
20
⎯
6
15
⎯
⎯
40
⎯
⎯
20
⎯
⎯
15
⎯
5
7.5
Unit
ns
ns
ns
ns
ns
MHz
μs
ns
ns
ns
ns
ns
pF
4
2012-02-29