TMP1942FDU Datasheet, PDF (22/106 Pages) Toshiba Semiconductor – 32bit TX System RISC

TMP1942FD
3.2.5
DSU-ICE Interface
If Port 37 (P37) is sampled high at the rising edge of RESET , the TMP1942FD enters
DSU mode, which is used for software debugging using an external DSU-ICE unit. In DSU
mode, Port A serves as an interface to the DSU-ICE, and cannot be used for other functions.
Consult the DSU-ICE operation manual for a description of debugging using the DSU-ICE.
When the TMP1942FD is in DSU mode, the on-chip flash memory provides a security
feature.
(1) Flash security feature
The TMP1942FD supports on-board debugging using a DSU-ICE while it is installed
on a printed circuit board. The TMP1942FD provides a security feature to prevent
intrusive access to the flash memory. When the flash memory is in the secure state, a
DSU-ICE is denied access to the entirety of the flash memory.
(2) Securing the flash memory (Disabling debugging with a DSU-ICE)
Once program debugging is completed, set the FSE bit in the Flash Control/Status
Register and write the Auto Security On command. This turns on the security feature.
While the flash memory is in the secure state, a DSU-ICE cannot read its contents.
When the chip is powered off and powered on again, the SEQON bit in the SEQMOD
register is automatically set, which disables debugging using a DSU-ICE until the flash
memory is unsecured.
(3) Unsecuring the flash memory (Enabling debugging with a DSU-ICE)
The flash memory may only be unsecured by clearing the SEQON bit in the
SEQMOD register and then writing a special code (0x0000_00C5) to the Security
Control (SEQCNT) register. This prevents runaway software from inadvertently
turning off the security feature. Unsecuring the flash memory enables the DSU
interface. The flash memory can be secured again by setting the SEQON bit in the
SEQMOD and writing 0x0000_00C5 to the SEQCNT while the chip is powered.
7
6
5
4
3
2
1
0
SEQMOD
Bit Symbol
SEQON
(0xFFFF_E510) Read/Write
R/W
Reset Value
1
Function
1: Security on
0: Security off
Note: This register must be read as a 32-bit quantity. Bits 1 to 31 are read as 0s.
TMP1942FD-21