TMP89FW20AUG Datasheet, PDF (210/542 Pages) Toshiba Semiconductor – 8 Bit Microcontroller TLCS-870/C1 Series

14. 16-bit Timer Counter (TCB)
14.4 Timer Function
TMP89FW20A
14.4.4 Window mode
In the window mode, the up counter counts up at the rising edge of the pulse that is logical anded product
of the input pulse to the TCB0 pin (window pulse) and the internal clock.
14.4.4.1 Setting
Setting the operation mode selection TB0MOD<TB0M> to "101" activates the window mode. Select
the source clock at TB0MOD<TB0CK>.
Select the window pulse level at the trigger edge input selection TB0MOD<TB0TED>. Setting
TB0MOD<TB0TED> to "0" enables counting up as long as the window pulse is at the "H" level. Setting
TB0MOD<TB0TED> to "1" enables counting up as long as the window pulse is at the "L" level.
Note that this mode uses the TB0 input pin, and the TCB0 pin must be set to the input mode before-
hand in port settings.
The operation is started by setting TB0CR<TB0S> to "1". After the timer is started, writing to
TB0MOD and TB0CR<TB0OVE> is disabled. Be sure to complete the required mode settings before start-
ing the timer.
14.4.4.2 Operation
After the operation is started, when the level selected at TB0MOD<TB0TED> is input to the TCB0
pin, the up counter increments according to the source clock selected at TB0MOD<TB0CK>. When a
match between the up counter value and the value set to timer register A (TB0DRA) is detected, an
INTTCB0 interrupt request is generated and the up counter is cleared to "0x0000". After being cleared,
the up counter restarts counting.
The maximum frequency to be supplied must be slow enough for the program to analyze the count val-
ue. Define a frequency pulse that is sufficiently lower than the programmed internal source clock.
Setting TB0CR<TB0S> to "0" during the timer operation causes the up counter to stop counting and
be cleared to "0x0000".
14.4.4.3 Auto capture
Refer to "14.4.1.3 Auto capture".
14.4.4.4 Register buffer configuration
Refer to "14.4.1.4 Register buffer configuration".
2012/5/18
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