SSM5P05FU_07 Datasheet, PDF (2/5 Pages) Toshiba Semiconductor – Power Management Switch

Marking
5
4
Equivalent Circuit (top view)
5
4
SSM5P05FU
DH
Q1
Q2
1
2
3
1
2
3
Electrical Characteristics (Ta = 25°C) (Q1, Q2 common)
Characteristics
Gate leakage current
Drain-Source breakdown voltage
Drain cut-off current
Gate threshold voltage
Forward transfer admittance
Drain-Source ON resistance
Input capacitance
Reverse transfer capacitance
Output capacitance
Switching time
Turn-on time
Turn-off time
Note2: Pulse test
Symbol
Test Condition
Min Typ. Max Unit
I_GSS
V_GS = ±12 V, V_DS = 0
⎯
⎯
±1
μA
V _{(BR) DSS} I_D = −1 mA, V_GS = 0
−20 ⎯
⎯
V
I_DSS
V_DS = −20 V, V_GS = 0
⎯
⎯
−1
μA
V_th
V_DS = −3 V, I_D = −0.1 mA
−0.6 ⎯
−1.1
V
⎪Y_fs⎪
V_DS = −3 V, I_D = −50 mA (Note2) 100
⎯
⎯
mS
I_D = −100 mA, V_GS = −4 V (Note2) ⎯
2.1 3.3
R_{DS (ON)}
Ω
I_D = −50 mA, V_GS = −2.5 V (Note2) ⎯
3.2 4.0
C_iss
⎯
27
⎯
pF
C_rss
V_DS = −3 V, V_GS = 0, f = 1 MHz
⎯
7
⎯
pF
C_oss
⎯
21
⎯
pF
t_on
V_DD = −3 V, I_D = −50 mA,
t_off
V_GS = 0~−2.5 V
⎯
70
⎯
ns
⎯
70
⎯
Switching Time Test Circuit (Q1, Q2 Common)
(a) Test circuit
0
IN
−2.5 V
10 μs
V_DD = −3 V
Duty ^<= 1%
V_IN: t_r, t_f < 5 ns
(Z_out = 50 Ω)
Common Source
Ta = 25°C
OUT
R_L
V_DD
(b) V_IN
0V
(c)V_OUT
−2.5 V
V_{DS (ON)}
V_DD
10%
90%
90%
10%
t_r
t_f
t_on
t_off
Precaution
V_th can be expressed as voltage between gate and source when low operating current value is I_D = −100 μA for
this product. For normal switching operation, V_{GS (on)} requires higher voltage than V_th and V_{GS (off)} requires
lower voltage than V_th. (Relationship can be established as follows: V_{GS (off)} < V_th < V_{GS (on)} )
Please take this into consideration for using the device.
2
2007-11-01