SSM3J16FV Datasheet, PDF (2/5 Pages) Toshiba Semiconductor – Field Effect Transistor Silicon P Channel MOS Type High Speed Switching Applications Analog Switch Applications

Electrical Characteristics (Ta = 25°C)
Characteristic
Gate leakage current
Drain-Source breakdown voltage
Drain cut-off current
Gate threshold voltage
Forward transfer admittance
Drain-Source on-resistance
Input capacitance
Reverse transfer capacitance
Output capacitance
Switching time
Turn-on time
Turn-off time
Symbol
Test Condition
I_GSS
V _{(BR) DSS}
I_DSS
V_th
⎪Y_fs⎪
R_{DS (ON)}
C_iss
C_rss
C_oss
t_on
t_off
V_GS = ±10 V, V_DS = 0
I_D = −0.1 mA, V_GS = 0
V_DS = −20 V, V_GS = 0
V_DS = −3 V, I_D = −0.1 mA
V_DS = −3 V, I_D = −10 mA
I_D = −10 mA, V_GS = −4 V
I_D = −10 mA, V_GS = −2.5 V
I_D = −1 mA, V_GS = −1.5 V
V_DS = −3 V, V_GS = 0, f = 1 MHz
V_DD = −3 V, I_D = − 10 mA,
V_GS = 0 ~ −2.5 V
SSM3J16FV
MIN. TYP. MAX. UNIT
⎯
⎯
±1
μA
−20 ⎯
⎯
V
⎯
⎯
−1
μA
−0.6 ⎯
−1.1
V
25
⎯
⎯
mS
⎯
6
8
⎯
8
12
Ω
⎯
18
45
⎯
11
⎯
pF
⎯
3.7
⎯
pF
⎯
10
⎯
pF
⎯ 130 ⎯
ns
⎯
190
⎯
Switching Time Test Circuit
(a) Test circuit
OUT
0
IN
−2.5V
10 μs
V_DD = −3 V
Duty ^<= 1%
V_IN: t_r, t_f < 5 ns
(Z_out = 50 Ω)
Common Source
Ta = 25°C
R_L
V_DD
(b) V_IN
0V
(c) V_OUT
−2.5 V
V_{DS (ON)}
V_DD
10%
90%
90%
10%
t_r
t_f
t_on
t_off
Precaution
V_th can be expressed as the voltage between the gate and source when the low operating current value is I_D =
100 μA for this product. For normal switching operation, V_{GS (on)} requires a higher voltage than V_th and V_{GS (off)}
requires a lower voltage than V_th. (The relationship can be established as follows: V_{GS (off)} < V_th < V_{GS (on).})
Be sure to take this into consideration when using the device.
2
2007-11-01