TMP92CM22FG Datasheet, PDF (164/260 Pages) Toshiba Semiconductor – CMOS 32-Bit Microcontroller

TMP92CM22
1. Transmission
In SCLK output mode 8-bit data and a synchronous clock are output on the
TXD0 and SCLK0 pins respectively each time the CPU writes the data to the
transmission buffer. When all data is outputted, INTES0<ITX0C> will be set to
generate the INTTX0 interrupt.
Timing of writing
transmission data
SCLK0 output
(<SCLKS> = 0
rising mode)
SCLK0 output
(<SCLKS> = 1
falling mode)
TXD0
ITX0C
(INTTX0 interrupt
request)
Bit0
Bit1
(Internal clock
timinig)
Bit6
Bit7
Figure 3.9.19 Transmission Operation in I/O Interface Mode (SCLK0 output mode)
In SCLK input mode, 8-bit data is output from the TXD0 pin when the SCLK0
input becomes active after the data has been written to the transmission buffer by
the CPU.
When all data is outputted, INTES0<ITX0C> will be set to generate INTTX0
interrupt.
SCLK0 input
(<SCLKS> = 0
rising mode)
SCLK0 input
(<SCLKS> = 1
falling mode)
TXD0
ITX0C
(INTTX0 interrupt
request)
Bit0
Bit1
Bit5
Bit6
Bit7
Figure 3.9.20 Transmission Operation in I/O Interface Mode (SCLK0 input mode)
92CM22-162
2007-02-16