TMP86PM29BFG Datasheet, PDF (149/204 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

TMP86PM29BFG
12.3.2 Shift edge
The leading edge is used to transmit, and the trailing edge is used to receive.
12.3.2.1 Leading edge
Transmitted data are shifted on the leading edge of the serial clock (falling edge of the SCK pin input/
output).
12.3.2.2 Trailing edge
Received data are shifted on the trailing edge of the serial clock (rising edge of the SCK pin input/out-
put).
SCK pin
SO pin
Shift register
SCK pin
SI pin
Shift register
Bit 0
Bit 1
Bit 2
Bit 3
3210 _*321 _**32
(a) Leading edge
***³
Bit 0
Bit 1
Bit 2
Bit 3
****
0_*** 10_**
(b) Trailing edge
210_* 3210
Figure 12-5 Shift edge
*^{; Don’t care}
12.4 Number of bits to transfer
Either 4-bit or 8-bit serial transfer can be selected. When 4-bit serial transfer is selected, only the lower 4 bits of
the transmit/receive data buffer register are used. The upper 4 bits are cleared to “0” when receiving.
The data is transferred in sequence starting at the least significant bit (LSB).
12.5 Number of words to transfer
Up to 8 words consisting of 4 bits of data (4-bit serial transfer) or 8 bits (8-bit serial transfer) of data can be trans-
ferred continuously. The number of words to be transferred can be selected by SIOCR2<BUF>.
An INTSIO interrupt is generated when the specified number of words has been transferred. If the number of
words is to be changed during transfer, the serial interface must be stopped before making the change. The number of
words can be changed during automatic-wait operation of an internal clock. In this case, the serial interface is not
required to be stopped.
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