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TMP86CH21AUG Datasheet, PDF (148/188 Pages) Toshiba Semiconductor – 8 Bit Microcontroller
12. Asynchronous Serial interface (UART )
12.9 Status Flag
TMP86CH21AUG
UARTSR<RBFL>
RXD pin
Shift register
RDBUF
UARTSR<OERR>
INTRXD interrupt
Final bit
xxx0**
yyyy
Stop
xxxx0*
1xxxx0
After reading UARTSR then
RDBUF clears OERR.
Figure 12-7 Generation of Overrun Error
Note:Receive operations are disabled until the overrun error flag UARTSR<OERR> is cleared.
12.9.4 Receive Data Buffer Full
Loading the received data in RDBUF sets receive data buffer full flag UARTSR<RBFL> to "1". The
UARTSR<RBFL> is cleared to “0” when the RDBUF is read after reading the UARTSR.
RXD pin
Final bit
Stop
Shift register
xxx0**
xxxx0*
1xxxx0
RDBUF
yyyy
xxxx
UARTSR<RBFL>
INTRXD interrupt
After reading UARTSR then
RDBUF clears RBFL.
Figure 12-8 Generation of Receive Data Buffer Full
Note:If the overrun error flag UARTSR<OERR> is set during the period between reading the UARTSR and reading
the RDBUF, it cannot be cleared by only reading the RDBUF. Therefore, after reading the RDBUF, read the
UARTSR again to check whether or not the overrun error flag which should have been cleared still remains
set.
12.9.5 Transmit Data Buffer Empty
When no data is in the transmit buffer TDBUF, UARTSR<TBEP> is set to “1”, that is, when data in TDBUF
are transferred to the transmit shift register and data transmit starts, transmit data buffer empty flag
UARTSR<TBEP> is set to “1”. The UARTSR<TBEP> is cleared to “0” when the TDBUF is written after
reading the UARTSR.
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