TMP88CS42NG Datasheet, PDF (142/216 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

13. Motor Control Circuit (PMD: Programmable motor
driver)
TMP88CS42NG
13.4.1 Configuration of the Timer Unit
The timer unit consists mainly of a mode timer, three timer comparator, and mode capture register, and is
controlled by timer control registers and timer compare registers.
• The mode timer can be reset by a signal from the position detection circuit, Timer 3, or overload pro-
tective circuit. If the mode timer overflows without being reset, it stops at FFFFH and sets an overflow
flag in the control register.
• The value of the mode timer during counting can be read by capturing the count in software and read-
ing the capture register.
• Timer 1 and Timers 2 and 3 generate an interrupt signal by magnitude comparison and matching com-
parison, respectively. Therefore, Timer 1 can generate an interrupt signal even when it could not write
to the compare register in time and the counter value at the time of writing happens to exceed the regis-
ter’s set value.
• When any one of Timers 1 to 3 interrupts occurs, the next interrupts can be enabled by writing a new
value to the respective compare registers (CMP1, CMP2, CMP3).
• When capturing by position detection is enabled, the capture register has the timer value captured in it
each time position is detected. In this way, the capture register always holds the latest value.
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