TMP86PH46NG Datasheet, PDF (135/170 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

TMP86PH46NG
11.9 Status Flag
11.9.1 Parity Error
When parity determined using the receive data bits differs from the received parity bit, the parity error flag
UARTSR<PERR> is set to “1”. The UARTSR<PERR> is cleared to “0” when the RDBUF is read after read-
ing the UARTSR.
RXD pin
Shift register
UARTSR<PERR>
INTRXD interrupt
Parity
xxxx0_**
Stop
pxxxx0_*
1pxxxx0
After reading UARTSR then
RDBUF clears PERR.
Figure 11-5 Generation of Parity Error
11.9.2 Framing Error
When “0” is sampled as the stop bit in the receive data, framing error flag UARTSR<FERR> is set to “1”.
The UARTSR<FERR> is cleared to “0” when the RDBUF is read after reading the UARTSR.
RXD pin
Shift register
UARTSR<FERR>
INTRXD interrupt
Final bit
xxx0_**
Stop
xxxx0_*
0xxxx0
After reading UARTSR then
RDBUF clears FERR.
Figure 11-6 Generation of Framing Error
11.9.3 Overrun Error
When all bits in the next data are received while unread data are still in RDBUF, overrun error flag
UARTSR<OERR> is set to “1”. In this case, the receive data is discarded; data in RDBUF are not affected.
The UARTSR<OERR> is cleared to “0” when the RDBUF is read after reading the UARTSR.
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