TC581282AXB Datasheet, PDF (13/31 Pages) Toshiba Semiconductor – 128-MBIT (16M X 8 BITS) CMOS NAND E2PROM

TC581282AXB
PIN FUNCTIONS
The device is a serial access memory which utilizes time-sharing input of address information. The device pin-outs
are configured as shown in Figure 1.
1
2
3
4
5
6
7
8
Command Latch Enable: CLE
A NC
NC
The CLE input signal is used to control loading of B NC
NC
the operation mode command into the internal _C
NU CLE NU NU NU NU
command register. The command is latched into the
command register from the I/O port on the rising edge
D
NU ALE NU NU NU NU
of the WE signal while CLE is High.
E
WP WE NU NU NU GND
F
NU NU NU NU NU NU
Address Latch Enable: ALE
G
NU NU NU NU RY/BY NU
The ALE signal is used to control loading of either ^H
CE I/O1 I/O3 NU NU NU
address information or input data into the internal ^J
RE NU NU V_CC I/O8 I/O7
address/data register.
K
V_SS I/O2 I/O4 I/O6 I/O5 NC
Address information is latched on the rising edge of L NC
NC
WE if ALE is High.
M NC
NC
Input data is latched if ALE is Low.
Figure1. Pinout
Chip Enable: CE
The device goes into a low-power Standby mode when CE goes High during a wait state. The CE signal is
ignored when device is in Busy state ( RY/BY = L), such as during a Program or Erase or Read operation, and
will not enter Standby mode even if the CE input goes High..
Write Enable: WE
The WE signal is used to control the acquisition of data from the I/O port.
Read Enable: RE
The RE signal controls serial data output. Data is available tREA after the falling edge of RE .
The internal column address counter is also incremented (Address = Address + l) on this falling edge.
I/O Port: I/O1 to 8
The I/O1 to 8 pins are used as a port for transferring address, command and input/output data to and from the
device.
Write Protect: WP
The WP signal is used to protect the device from accidental programming or erasing. The internal voltage
regulator is reset when WP is Low. This signal is usually used for protecting the data during the power-on/off
sequence when input signals are invalid.
Ready/Busy: RY/BY
The RY/BY output signal is used to indicate the operating condition of the device. The RY/BY signal is in
Busy state ( RY/BY = L) during the Program, Erase and Read operations and will return to Ready state
( RY/BY = H) after completion of the operation. The output buffer for this signal is an open drain.
2001-12-04 13/31