TA8552AFN_02 Datasheet, PDF (13/16 Pages) Toshiba Semiconductor – PLL Data Synchronizer For DAT Streamer

TA8552AFN
(Note) Test Monitor Output Terminal
Tstsel
1
2
L
L
H
L
L
H
H
H
Datainput
Function
TTL input from 14pin (RD)
―
TTL input from 14pin (RD)
PBCK (20pin) & PBDT (21pin) becomes disable
ECL input from 14pin (RD) and 15pin (XRD)
―
TTL input from 14pin (RD)
The internal PLL becomes disable, and the
external clock from tstclk (23pin) becomes
enable as input data signal.
(Note) ● We commend the use of this IC under the comdition of ECL input from 14pin (RD) and
15pin (XRD) when (TSTSEL1, TSTSEL2) = (L, H)
● It is possible of the use of TTL input from 14pin (RD) when (TSTSEL1, TSTSEL2) = (L, L)
13
2002-10-30