TMP86FH47ADUG Datasheet, PDF (121/214 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

TMP86FH47ADUG
(2) External clock
When an external clock is selected by setting SIOCR1<SCK> to “111B”, the clock via the SCK pin
from an external source is used as the serial clock.
To ensure shift operation, the serial clock pulse width must be 4/fc or more for both “H” and “L”
levels.
SCK pin
tSCKL
tSCKH
tSCKL, tSCKH _{> 4/fc}
Figure 10-3 External Clock
10.3.1.2 Shift edge
The leading edge is used to transmit data, and the trailing edge is used to receive data.
(1) Leading edge shift
Data is shifted on the leading edge of the serial clock (falling edge of the SCK pin input/output).
(2) Trailing edge shift
Data is shifted on the trailing edge of the serial clock (rising edge of the SCK pin input/output).
SIOCR1<SIOS>
SCK pin
Shift register _{01234567 *0123456}
Shift out
SO pin
Bit7
**012345 ***01234 ****0123 *****012
******01
Bit6
Bit5
Bit4
Bit3
Bit2
(a) Leading edge shift (Example of MSB transfer)
*******0
Bit1
********
Bit0
SIOCR1<SIOS>
SCK pin
SI pin
Shift register
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
******** 7*******
67******
567*****
4567****
34567*** 234567**
(b) Trailing edge shift (Example of MSB transfer)
1234567* 01234567
Figure 10-4 Shift Edge
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