TMP86CH49FG Datasheet, PDF (101/252 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

TMP86CH49FG
Example :Duty measurement (resolution fc/2⁷ [Hz])
CLR
(INTTC1SW). 0
PINTTC1:
SINTTC1:
VINTTC1:
LD
DI
SET
EI
LD
:
CPL
JRS
LD
LD
LD
RETI
LD
LD
LD
:
RETI
:
DW
(TC1CR), 00000110B
(EIRL). 5
(TC1CR), 00100110B
(INTTC1SW). 0
F, SINTTC1
A, (TC1DRBL)
W,(TC1DRBH)
(HPULSE), WA
A, (TC1DRBL)
W,(TC1DRBH)
(WIDTH), WA
PINTTC1
; INTTC1 service switch initial setting
Address set to convert INTTC1SW at each INTTC1
; Sets the TC1 mode and source clock
; IMF= “0”
; Enables INTTC1
; IMF= “1”
; Starts TC1 with an external trigger at MCAP1 = 0
; INTTC1 interrupt, inverts and tests INTTC1 service switch
; Reads TC1DRB (High-level pulse width)
; Stores high-level pulse width in RAM
; Reads TC1DRB (Cycle)
; Stores cycle in RAM
; Duty calculation
; INTTC1 Interrupt vector
TC1 pin
INTTC1 interrupt request
INTTC1SW
HPULSE
WIDTH
Page 87