TPCP8404 Datasheet, PDF (1/11 Pages) Toshiba Semiconductor – TOSHIBA Field Effect Transistor Silicon P, N Channel MOS Type (U-MO/U-MOS)

TPCP8404
TOSHIBA Field Effect Transistor Silicon P, N Channel MOS Type (U-MOⅤ/U-MOSⅣ)
TPCP8404
Portable Equipment Applications
Motor Drive Applications
• Low drain-source ON-resistance : P Channel R_{DS (ON)} = 38 mΩ(typ.)
(VGS=−10V)
N Channel R_{DS (ON)} = 38 mΩ(typ.)
（VGS=10V)
• High forward transfer admittance : P Channel |Y_fs| = 7.3 S (typ.)
N Channel |Y_fs| = 8 S (typ.)
• Low leakage current : P Channel I_DSS = −10 μA (max) (V_DS = −30 V)
N Channel I_DSS = 10 μA (max) (V_DS = 30 V)
• Enhancement mode
: P Channel V_th = −0.8 to −2.0 V (V_DS = −10 V, I_D = −1 mA)
N Channel V_th = 1.3 to 2.5 V (V_DS = 10 V, I_D = 1 mA)
Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Symbol
Rating
Unit
Drain-source voltage
V_DSS
−30
Drain-gate voltage (R_GS = 20 kΩ)
V_DGR
−30
Gate-source voltage
V_GSS
±20
Drain
current
DC
Pulse
(Note 1) I_D
−4
(Note 1) I_DP
−16
Drain power ^{Single-device operation}
dissipation
(Note 3a)
P_{D (1)}
1.48
(t = 5 s)
Single-device value at
(Note 2a) _{dual operation (Note 3b)}
P_{D (2)}
1.23
Drain power ^{Single-device operation}
dissipation
(Note 3a)
P_{D (1)}
0.58
(t = 5 s)
Single-device value at
(Note 2b) _{dual operation (Note 3b)}
P_{D (2)}
0.36
30
V
30
V
±20
V
4
A
16
1.48
1.23
W
0.58
0.36
Single pulse avalanche energy
(Note 4)
E_AS
2.6
2.6
mJ
Avalanche current
I_AR
−2
2
A
Repetitive avalanche energy
Single-device value at dual operation
E_AR
(Note 2a, 3b, 5)
0.009
mJ
Channel temperature
Storage temperature range
T_ch
150
°C
T_stg
−55 to 150
°C
Note: For Notes 1 to 5, refer to the next page.
Using continuously under heavy loads (e.g. the application of high
temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the
absolute maximum ratings. Please design the appropriate
reliability upon reviewing the Toshiba Semiconductor Reliability
Handbook (“Handling Precautions”/“Derating Concept and
Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
This transistor is an electrostatic-sensitive device. Handle with caution.
0.33±0.05
0.05 M A
8
5
Unit: mm
0.475
1
4
0.65
2.9±0.1
S
0.025 S
0.17±0.02
B
0.05 M B
A
0.8±0.05
0.28
+0.1
-0.11
1.12^+-00..1132
1.12^+-00..1132
1．Source1
2．Gate1
3．Source2
4．Gate2
5．Drain2
6．Drain2
7．Drain1
8．Drain1
0.28
+0.1
-0.11
JEDEC
⎯
JEITA
⎯
TOSHIBA
2-3V1G
Weight: 0.017 g (typ.)
Circuit Configuration
8
7
6
5
1
2
3
4
Marking (Note 6)
876
5
8404
123
4
Lot No.
1
2010-02-01