TPCP8103-H_09 Datasheet, PDF (1/7 Pages) Toshiba Semiconductor – High Efficiency DC-DC Converter Applications Notebook PC Applications Portable Equipment Applications CCFL Inverter Applications

TPCP8103-H
TOSHIBA Field Effect Transistor Silicon P-Channel MOS Type (Ultra-High-speed U-MOSIII)
TPCP8103-H
High Efficiency DC-DC Converter Applications
Notebook PC Applications
Portable Equipment Applications
CCFL Inverter Applications
0.33±0.05
0.05 M A
8
5
Unit: mm
• Small footprint due to a small and thin package
• High speed switching
• Small gate charge: Q_SW = 6.5 nC (typ.)
• Low drain-source ON-resistance: R_{DS (ON)} = 31 mΩ (typ.)
• High forward transfer admittance: |Y_fs| = 10 S (typ.)
• Low leakage current: I_DSS = −10 μA (max) (V_DS = −40V)
• Enhancement mode: V_th = −0.8 to −2.0 V (V_DS = −10 V, I_D = −1mA)
0.475 1
4
0.65
2.9±0.1
S
0.025 S
0.17±0.02
B
0.05 M B
A
0.8±0.05
0.28
+0.1
-0.11
1.12^+-00..1132
1.12^+-00..1132
Absolute Maximum Ratings (Ta = 25°C)
Characteristic
Symbol
Rating
Unit
1. Source
2. Source
3. Source
4. Gate
5. Drain
6. Drain
7. Drain
8. Drain
0.28
+0.1
-0.11
Drain-source voltage
Drain-gate voltage (R_GS = 20 kΩ)
Gate-source voltage
Drain current
DC (Note 1)
Pulsed (Note 1)
Drain power dissipation
(t = 5 s)
(Note 2a)
Drain power dissipation
(t = 5 s)
(Note 2b)
Single-pulse avalanche energy
(Note 3)
Avalanche current
Repetitive avalanche energy
(Note 4)
Channel temperature
Storage temperature range
V_DSS
V_DGR
V_GSS
I_D
I_DP
P_D
P_D
E_AS
I_AR
E_AR
T_ch
T_stg
−40
V
−40
V
±20
V
−4.8
A
−19.2
1.68
W
0.84
W
10.7
mJ
−4.8
A
0.09
mJ
150
°C
−55 to 150
°C
Note: For Notes 1 to 4, refer to the next page.
JEDEC
―
JEITA
―
TOSHIBA
2-3V1K
Weight: 0.017 g (typ.)
Circuit Configuration
8
7
6
5
1
2
3
4
Marking (Note 5)
87 65
Using continuously under heavy loads (e.g. the application of high
temperature/current/voltage and the significant change in temperature,
etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.)
are within the absolute maximum ratings. Please design the appropriate
reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual
reliability data (i.e. reliability test report and estimated failure rate, etc).
This transistor is an electrostatic-sensitive device. Handle with care.
8103H
※
123 4
Lot No.
1
2009-12-10