TPCM8001-H_07 Datasheet, PDF (1/7 Pages) Toshiba Semiconductor – TOSHIBA Field Effect Transistor Silicon N-Channel MOS Type (Ultra-High-Speed U-MOSIII)

TPCM8001-H
TOSHIBA Field Effect Transistor Silicon N-Channel MOS Type (Ultra-High-Speed U-MOSIII)
TPCM8001-H
High-Efficiency DC／DC Converter Applications
Notebook PC Applications
Portable-Equipment Applications
Unit: mm
0.8
8
0.25±0.05
0.05 M A
5
• Small footprint due to a small and thin package
• High-speed switching
• Small gate charge: Q_SW = 6.0 nC (typ.)
• Low drain-source ON-resistance: R_{DS (ON)} = 7 mΩ (typ.)
• High forward transfer admittance: |Y_fs| =36 S (typ.)
• Low leakage current: I_DSS = 10 μA (max) (V_DS = 30 V)
• Enhancement mode: V_th = 1.1 to 2.3 V (V_DS = 10 V, I_D = 1 mA)
0.2^{＋－00.2}
1
4
3.5±0.2
0.55
A
0.05 S
S
1
4
Absolute Maximum Ratings (Ta = 25°C)
Characteristic
Drain-source voltage
Drain-gate voltage (R_GS = 20 kΩ)
Gate-source voltage
Drain current
DC (Note 1)
Pulsed (Note 1)
Drain power dissipation (Tc=25°C)
Drain power dissipation
(t = 10 s)
(Note 2a)
Drain power dissipation
(t = 10 s)
(Note 2b)
Single-pulse avalanche energy
(Note 3)
Avalanche current
Repetitive avalanche energy
(Tc=25°C) (Note 4)
Channel temperature
Storage temperature range
Symbol
V_DSS
V_DGR
V_GSS
I_D
I_DP
P_D
P_D
P_D
E_AS
I_AR
E_AR
T_ch
T_stg
Rating
Unit
30
V
30
V
±20
V
20
A
60
30
W
2.3
W
1.0
W
104
mJ
20
A
1.8
mJ
150
°C
−55 to 150
°C
2.75±0.2
8
1,2,3：SOURCE
5,6,7,8：DRAIN
0.8±0.1
5
4：GATE
JEDEC
―
JEITA
―
TOSHIBA
2-4L1A
Weight: 0.028 g (typ.)
Circuit Configuration
8765
1234
Note: For Notes 1 to 4, refer to the next page.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate
reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and
Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
This transistor is an electrostatic-sensitive device. Handle with care.
1
2006-11-16