TPC8A07-H Datasheet, PDF (1/12 Pages) Toshiba Semiconductor – HIgh Effciency DC-DC Converter Applications Notebook PC Applications Portable-Equipment Applications

TPC8A07-H
TOSHIBA Field Effect Transistor with Built-in Schottky Barrier Diode
Silicon N-Channel MOS Type (U-MOS V -H)
TPC8A07-H
High Efficiency DC-DC Converter Applications
Notebook PC Applications
Portable-Equipment Applications
• Small footprint due to a small and thin package
• High-speed switching
• Small gate charge:
(Q1) Q_SW = 3.4 nC (typ.)
(Q2) Q_SW = 3.6 nC (typ.)
• Low drain-source ON-resistance: (Q1) R_{DS (ON)} = 21 mΩ (typ.)
(Q2) R_{DS (ON)} = 14 mΩ (typ.)
• Low leakage current:
(Q1) I_DSS = 10 μA (max) (V_DS = 30 V)
(Q2) I_DSS =100μA (max) (V_DS = 30 V)
• Enhancement mode: (Q1) V_th = 1.5 to 2.5 V (V_DS = 10 V, I_D = 1.0 mA)
(Q2) V_th = 1.3 to 2.3 V (V_DS = 10 V, I_D = 1.0 mA)
Absolute Maximum Ratings (Ta = 25°C)
Unit: mm
Characteristic
Symbol
Drain−source voltage
Drain−gate voltage (R_GS = 20 kΩ)
Gate−source voltage
Drain current
DC
Pulse
(Note 1)
(Note 1)
Drain power
dissipation
Single-device
operation (Note 3a)
(t = 10 s)
Single-device value
(Note 2a) at dual operation
(Note 3b)
Drain power
dissipation
Single-device
operation (Note 3a)
(t = 10 s)
Single-device value
(Note 2b) at dual operation
(Note 3b)
Single-pulse avalanche energy
(Note 4)
Avalanche current
Repetitive avalanche energy
(Note 2a, Note 3b, Note 5)
Channel temperature
Storage temperature range
V_DSS
V_DGR
V_GSS
I_D
I_DP
P_{D (1)}
P_{D (2)}
P_{D (1)}
P_{D 2)}
E_AS
I_AR
E_AR
T_ch
T_stg
Rating
Unit
(Q1)
(Q2)
30
30
V
30
30
V
±20
±20
V
6.8
8.5
A
27.2
34
1.5
W
1.1
0.75
W
0.45
60.1
94
mJ
6.8
8.5
A
0.11
0.09
mJ
150
°C
−55 to 150
°C
JEDEC
⎯
JEITA
⎯
TOSHIBA
2-6J1E
Weight: 0.085 g (typ.)
Circuit Configuration
Note: For Notes 1 to 5, refer to the next page.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability
Handbook (“Handling Precautions”/“Derating” Concept and Methods”) and individual reliability data (i.e.
reliability test report and estimated failure rate, etc).
This transistor is an electrostatic-sensitive device. Handle with care.
1
2009-07-21