TPC6902 Datasheet, PDF (1/7 Pages) Toshiba Semiconductor – Multi-Chip Transistor Silicon NPN / PNP Epitaxial Type

TOSHIBA Multi-Chip Transistor Silicon NPN / PNP Epitaxial Type
TPC6902
TPC6902
High-Speed Switching Applications
MOS Gate Drive Applications
Unit: mm
NPN and PNP transistors are mounted on a compact and slim package.
High DC current gain : NPN h_FE = 200 to 500 (I_C = 0.2 A)
: PNP h_FE = 200 to 500 (I_C = -0.2 A)
Low collector-emitter saturation voltage
: NPN V_{CE (sat)} = 0.14 V (max)
: PNP V_{CE (sat)} = -0.2 V (max)
High-speed switching
: NPN t_f = 45 ns (typ.)
: PNP t_f = 40 ns (typ.)
Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Rating
Symbol
Unit
NPN PNP
Collector-base voltage
V_CBO
60 - 30
V
Collector-emitter voltage
V_CEX
50 - 30
V
V_CEO
30 - 30
V
Emitter-base voltage
V_EBO
7
-7
V
Collector current
(Note 1)
DC
Pulse
I_C
2.0 - 1.7
A
I_CP
8.0 - 8.0
A
Base current
I_B
Collector power
dissipation (t=10 s)
(Note 2)
Single-device
operation
P_C
0.5 - 0.5
A
1.0
W
JEDEC
―
JEITA
―
TOSHIBA
2-3T1A
Weight: 0.011 g (typ.)
Collector power
Single-device
operation
P_C
dissipation (DC)
(Note 2) ^{Single-device}
value at dual
P_C
operation
0.7
W
0.6
Thermal resistance,
junction to ambient
(t=10 s)
(Note 2)
Single-device
operation
R_{th (j-a)}
125
°C/W
Thermal resistance,
junction to ambient (DC)
(Note 2)
Single-device
operation
Single-device
value at dual
operation
Junction temperature
Storage temperature range
R_{th (j-a)}
R_{th (j-a)}
T_j
T_stg
178
208
150
−55 to 150
°C/W
°C
°C
Note 1: Ensure that the junction temperature does not exceed 150°C.
Note 2: Mounted on an FR4 board (glass epoxy, 1.6 mm thick, Cu area: 645 mm²)
Note 3: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
1
2009-09-10