TMP86FM25F Datasheet, PDF (1/53 Pages) Toshiba Semiconductor – CMOS 8-Bit Microcontroller

Comparison table of TMP86CM25F/CS25F/PS25F/C925XB and TMP86CM25AF/FM25F
Difference
TMP86CM25F/
TMP86CS25F
TMP86PS25F
TMP86C925XB
(Emulation chip)
TMP86FM25F
TMP86CM25AF
ROM
RAM
I/O
External
Interrupt
AD Converter
Timer Counter
Serial Interface
LCD
Key-on
Wakeup
Operating
Voltage
in MCU Mode
Operating
Temperature
in MCU Mode
Writing to
Flash Memory
Package
CPU Wait (Note 1)
32 K (Mask ROM)
60 K (Mask ROM)
2K
42 pin
60 K (OTP)
−
−
42 pin (MCU part)
5 pin
8-bit AD converter × 8 ch
18-bit timer × 1 ch
8-bit timer × 4 ch
8-bit SIO × 2 ch
UART × 1 ch
60 seg × 16 com
4 ch
1.8 to 5.5 V at 4.2 MHz
2.7 to 5.5 V at 8 MHz
4.5 to 5.5 V at 16 MHz
1.8 to 5.25 V at 4.2 MHz
2.7 to 5.25 V at 8 MHz
4.5 to 5.25 V at 16 MHz
32 K (Flash)
32 K (Mask ROM)
2K
42 pin
5 pin
8-bit AD converter × 8 ch (Note 3)
18-bit timer × 1 ch
8-bit timer × 4 ch
8-bit SIO × 2 ch
UART × 1 ch
60 seg × 16 com (Note 4)
4 ch
1.8 to 3.6 V at 4.2 MHz (External clock)
1.8 to 3.6 V at 8 MHz (Resonator)
2.7 to 3.6 V at 16 MHz
−40 to 85℃
0 to 60°C
−40 to 85°C
−
P-QFP100-1420-0.65A
N/A
FBGA272
2.7 to 3.6V at 16 MHz
−
25°C ± 5°C
P-QFP100-1420-0.65A
Available (Note 2)
Note 1: The CPU wait is a CPU halt function for stabilizing of power supply of Flash memory. The CPU wait
period is as follows. In the CPU wait period except RESET, CPU is halted but peripheral functions
are not halted. Therefore, if the interrupt occurs during the CPU wait period, the interrupt latch is set.
In this case, if the IMF has been set to “1”, the interrupt service routine is executed after CPU wait
period. For details refer to 1.1 “Flash Memory” in TMP86FM25F data sheet.
Condition
After reset release
Changing from STOP mode to NORMAL mode
(at EEPCR<MNPWDW> = “1”)
Changing from STOP mode to SLOW mode
(at EEPCR<MNPWDW> = “1”)
Changing from IDLE0/1/2 mode to NORMAL mode
(at EEPCR<ATPWDW> = “0”)
Changing from SLEEP0/1/2 mode to SLOW mode
(at EEPCR<ATPWDW> = “0”)
Wait Time
2¹⁰/fc[s]
2¹⁰/fc[s]
2³/fs[s]
2¹⁰/fc[s]
2³/fs[s]
Halt/Operate
CPU Peripherals
Halt
Halt
Halt
Operate
Halt
Operate
Halt
Operate
Halt
Operate
Note 2: Though the TMP86CM25AF does not have a Flash memory, the CPU wait function is inserted in
TMP86CM25A to keep the compatibility with Flash product (TMP86FM25F).
Note 3: AD conversion time of TMP86CM25A/FM25 is different from that of TMP86CM25/CS25/PS25/C925.
For details, refer to 2.12 “8-Bit AD Converter (ADC)”.
Note 4: The reference voltage of TMP86CM25A/FM25 is different from that of TMP86CM25/CS25/
PS25/C925. For details, refer to “Electrical Characteristics”.
2004-03-01