TLP715 Datasheet, PDF (1/9 Pages) Toshiba Semiconductor – TOSHIBA PHOTOCOUPLER GaA As IRED & PHOTO-IC

TOSHIBA PHOTOCOUPLER GaAℓAs IRED & PHOTO-IC
TLP715
Isolated Bus Drivers
High Speed Line Receivers
Microprocessor System Interfaces
4.58±0.25
654
TLP715
Unit in mm
The Toshiba TLP715 consists of a GaAℓAs light-emitting diode and an
integrated high-gain, high-speed photodetector. This unit is a 6-pin SDIP. The
TLP715 is 50% smaller than the 8-PIN DIP and meets the reinforced insulation
class requirements of international safety standards. Therefore the mounting
area can be reduced in equipment requiring safety standard certification.
The detector has a totem pole output stage to provide both source and sink
driving. The detector IC has an internal shield that provides a guaranteed
common-mode transient immunity of 10 kV / μs.
The TLP715 is buffer logic type. For inverter logic type, the TLP718 is in
line-up.
z Buffer logic output (totem pole output)
123
1.27±0.2
0.4±0.1
7.62±0.25
1.25±0.25
9.7±0.3
z Guaranteed performance over temperature : −40 to 100°C
z Power supply voltage : 4.5 to 20 V
z Input current: IFLH = 3mA (Max)
TOSHIBA
11-5J1
Weight:0.26 g (t yp .)
11-5J1
z Switching time ( tpLH / tpHL) : 250 ns (Max)
Pin Configuration (Top View)
z Common-mode transient immunity : ±10 kV / μs (Min)
z Isolation voltage : 5000 Vrms (Min)
1
z UL recognized
2
UL1577, File No.E67349
z c-UL recognized
3
CSA Component Acceptance Service No. 5A, File No.E67349
VCC ₆ ^1:ANODE
2:N.C.
5 ^3:CATHODE
4:GND
GND
SHIELD
4
5:Vo (Output)
6:Vcc
z Option (D4)
TÜV recognized / VDE under application : DIN EN60747-5-5
Maximum Operating Insulation Voltage : 890 V_PK
Highest Permissible Over Voltage
: 8000 V_PK
(Note) : When a EN60747-5-5 approved type is needed,
Please designate “Option(D4)”
z Construction Mechanical Rating
7.62 mm pitch
TLPXXX type
10.16 mm pitch
TLPXXXF type
Creepage Distance
Clearance
Insulation Thickness
7.0 mm (Min)
7.0 mm (Min)
0.4 mm (Min)
8.0 mm (Min)
8.0 mm (Min)
0.4 mm (Min)
Schematic
I_F
1+
VF
3-
SHIELD
I_CC
V_CC
6
Tr1
I_O
V_O
Tr2
5
GND
4
Truth Table
0.1 μF bypass capacitor must be
connected between pins 6 and 4. (Note 5)
Input
H
L
LED
ON
OFF
Tr1
ON
OFF
Tr2
OFF
ON
Output
H
L
1
2012-12-19