TLP701 Datasheet, PDF (1/8 Pages) Toshiba Semiconductor – Industrial inverters Inverter for air conditioners IGBT/Power MOS FET gate drive

TLP701
TOSHIBA Photocoupler GaAℓAs IRED + Photo IC
TLP701
Industrial inverters
Inverter for air conditioners
IGBT/Power MOS FET gate drive
TLP701 consists of a GaAℓAs light-emitting diode and an integrated
photodetector.
This unit is 6-lead SDIP package. The TLP701 is 50% smaller than the 8-pin
DIP and meets the reinforced insulation class requirements of international safety
standards. Therefore the mounting area can be reduced in equipment requiring
safety standard certification.
The TLP701 is suitable for gate driving circuits for IGBTs or power MOSFETs.
In particular, the TLP701 is capable of “direct” gate driving of low-power IGBTs.
4.58±0.25
654
123
Unit in mm
7.62±0.25
• Peak output current
: ±0.6 A (max)
• Guaranteed performance over temperature : −40 to 100°C
• Supply current
: 2 mA (max)
• Power supply voltage
: 10 to 30 V
• Threshold input current
: I_FLH = 5 mA (max)
• Switching time (t_pLH / t_pHL)
: 700 ns (max)
• Common mode transient immunity
: ±10 kV/µs (min)
• Isolation voltage
: 5000 Vrms (min)
• Construction mechanical rating
7.62-mm pitch
standard type
10.16-mm pitch
TLPXXXF type
Creepage Distance
Clearance
Insulation Thickness
7.0 mm (min)
7.0 mm (min)
0.4 mm (min)
8.0 mm (min)
8.0 mm (min)
0.4 mm (min)
• UL Recognized
: UL1577, File No. E67349
• Option (D4)
TÜV approved
: EN60747-5-2
Certificate No. R50033433
Maximum operating insulation voltage : 890 Vpk
Highest permissible over voltage
: 8000 Vpk



( Note ) When a EN60747-5-2 approved type is needed,
please designate the “Option(D4)”
Truth Table
Input
LED
Tr1
Tr2
Output
H
ON
ON
OFF
H
L
OFF
OFF
ON
L
1.27±0.2
0.4±0.1
1.25±0.25
9.7±0.3
TOSHIBA


11-5J1

Weightɿ0.26 g (t yp .)
11-5J1
Pin Configuration (Top View)
1
2
3
SHIELD
6
1: ANODE
2: NC
3: CATHODE
5
4: GND
5: V_O ( OUTPUT )
4
6: V_CC
Schematic
I_F
1+
V_F
3−
(Tr1)
I_{CC 6}
V_CC
I_{O 5}
(Tr2)
V_O
SHIELD
4
GND
A 0.1-µF bypass capacitor must be connected
between pins 6 and 4. (See Note 6.)
1
2006-01-17