TC7PA175FU Datasheet, PDF (1/8 Pages) Toshiba Semiconductor – D-Type Flip-Flop with Clear

TC7PA175FU
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC7PA175FU
D-Type Flip-Flop with Clear
Features
• Operating voltage range: V_CC = 1.8~3.6 V
• High-speed operation: t_pd = 3.5 ns (max) at V_CC = 3.0~3.6 V
t_pd = 4.6 ns (max) at V_CC = 2.3~2.7 V
t_pd = 9.2 ns (max) at V_CC = 1.8 V
• High-level output current:
I_OH/I_OL = ±24 mA (min) at V_CC = 3.0 V
• 3.6-V tolerant inputs
I_OH/I_OL = ±18 mA (min) at V_CC = 2.3 V
I_OH/I_OL = ±6 mA (min) at V_CC = 1.8 V
• 3.6-V power down protection output
Weight: 0.0068 g (typ.)
Absolute Maximum Ratings (Ta = 25°C)
Marking
Characteristics
Symbol
Value
Unit
Product name
Power supply voltage
V_CC
−0.5~4.6
V
DC input voltage
V_IN
−0.5~4.6
V
EAH
DC output voltage
−0.5~4.6 (Note 1)
V_OUT
−0.5~V_CC + 0.5
V
(Note 2)
Input diode current
Output diode current
I_IK
−50
mA
Pin Assignment (top view)
I_OK
−50 (Note 3) mA
DC output current
Power dissipation
I_OUT
±50
P_D
200
mA
mW
CK 1
CK
6 _CLR
DC V_CC/ground current
Storage temperature
I_CC
±100
T_stg
−65~150
mA
GND ₂
°C
CLR
5 _VCC
DQ
Note:
Using continuously under heavy loads (e.g. the application of high
D3
temperature/current/voltage and the significant change in temperature,
etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating
temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba
Semiconductor Reliability Handbook (“Handling Precautions”/“Derating
Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
4Q
Note 1: V_CC = 0 V
Note 2: High or Low state. The I_OUT absolute maximum rating must be adhered to.
Note 3: V_OUT < GND
1
2007-11-01