TC7MP3125FK Datasheet, PDF (1/23 Pages) Toshiba Semiconductor – Low Voltage/Low Power 2-Bit × 2 Dual Supply Bus Transceiver

TC7MP3125FK/FTG
TOSHIBA Digital Integrated Circuit Silicon Monolithic
TC7MP3125FK,TC7MP3125FTG
Low Voltage/Low Power 2-Bit × 2 Dual Supply Bus Transceiver
The TC7MP3125FK/FTG is a dual supply, advanced
high-speed CMOS 4-bit dual supply voltage interface bus
transceiver fabricated with silicon gate CMOS technology.
It is also designed with over voltage tolerant inputs and
outputs up to 3.6 V.
Designed for use as an interface between a 1.2-V, 1.5-V, 1.8-V,
or 2.5-V bus and a 1.8-V, 2.5-V or 3.6-V bus in mixed 1.2-V, 1.5-V,
1.8-V or 2.5-V/1.8-V, 2.5-V or 3.6-V supply systems.
The A-port interfaces with the 1.2-V, 1.5-V, 1.8-V or 2.5-V bus,
the B-port with the 1.8-V, 2.5-V, 3.3-V bus.
The direction of data transmission is determined by the level of
the DIR input. The enable input (OE) can be used to disable the
device so that the buses are effectively isolated.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
TC7MP3125FK
TC7MP3125FTG
Features
• Bidirectional interface between 1.2-V and 1.8-V, 1.2-V and
2.5-V, 1.2-V and 3.3-V, 1.5-V and 2.5-V, 1.5-V and 3.3-V, 1.8-V
and 2.5-V, 1.8-V and 3.3-V or 2.5-V and 3.3-V buses.
• High-speed operation: t_pd = 6.8 ns (max) (V_CCA = 2.5 ± 0.2 V,
V_CCB = 3.3 ± 0.3 V)
t_pd = 8.9 ns (max) (V_CCA = 1.8 ± 0.15 V,
Weight
VSSOP16-P-0030-0.50: 0.02 g (typ.)
VQON16-P-0303-0.50: 0.013 g (typ.)
V_CCB = 3.3 ± 0.3 V)
t_pd = 10.3 ns (max) (V_CCA = 1.5 ± 0.1 V, V_CCB = 3.3 ± 0.3 V)
t_pd = 61 ns (max) (V_CCA = 1.2 ± 0.1 V, V_CCB = 3.3 ± 0.3 V)
t_pd = 9.5 ns (max) (V_CCA = 1.8 ± 0.15 V, V_CCB = 2.5 ± 0.2 V)
t_pd = 10.8 ns (max) (V_CCA = 1.5 ± 0.15 V, V_CCB = 2.5 ± 0.2 V)
t_pd = 60 ns (max) (V_CCA = 1.2 ± 0.15 V, V_CCB = 2.5 ± 0.2 V)
t_pd = 58 ns (max) (V_CCA = 1.2 ± 0.1 V, V_CCB = 1.8 ± 0.15 V)
• Output current: I_OH/I_OL = ±12 mA (min) (V_CC = 3.0 V)
I_OH/I_OL = ±9mA (min) (V_CC = 2.3 V)
I_OH/I_OL = ±3 mA (min) (V_CC = 1.65 V)
I_OH/I_OL = ±1mA (min) (V_CC = 1.4 V)
• Latch-up performance: ±300 mA
• ESD performance: Machine model ≥ ±200 V
Human body model ≥ ±2000 V
• Ultra-small package: VSSOP (US16), VQON16
• Low current consumption: Using the new circuit significantly reduces current consumption when OE = “H”.
Suitable for battery-driven applications such as PDAs and cellular phones.
• Floating A-bus and B-bus are permitted. (when OE = “H”)
3.6-V tolerant function and power-down protection provided on all inputs and outputs.
Note 1: Do not apply a signal to any bus pins when it is in the output mode. Damage may result.
Note: When mounting VQON package, the type of recommended flux is RA or RMA.
1
2007-10-19