TC7MH595FK_07 Datasheet, PDF (1/9 Pages) Toshiba Semiconductor – 8-Bit Shift Register/Latch (3-State)

TC7MH595FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC7MH595FK
8-Bit Shift Register/Latch (3-State)
The TC7MH595FK is an advanced high speed 8 bit shift
register/latch fabricated with silicon gate C²MOS technology.
It achieves the high speed operation similar to equivalent
bipolar schottky TTL while maintaining the CMOS low power
dissipation.
The TC7MH595FK contains an 8 bit static shift register which
feeds an 8 bit storage register.
Shift operation is accomplished on the positive going transition
of the SCK input. The output register is loaded with the contents
of the shift register on the positive going transition of the RCK
input. Since RCK and SCK signals are independent, parallel
outputs can be held stable during the shift operation. And, since
the parallel outputs are 3-state, it can be directly connected to 8
Weight: 0.02 g (typ.)
bit bus. This register can be used in serial-to-parallel conversion,
data receivers, etc.
An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply
voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.
This circuit prevents device destruction due to mismatched supply and input voltages.
Features
• High speed: f_max = 185 MHz (typ.) (V_CC = 5 V)
• Low power dissipation: I_CC = 4 μA (max) (Ta = 25°C)
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Power down protection is provided on all inputs.
• Balanced propagation delays: t_pLH ≈ t_pHL
• Wide operating voltage range: V_{CC (opr)} = 2~5.5 V
• Low noise: V_OLP = 1.0 V (max)
• Pin and function compatible with 74ALS595
1
2007-10-19