TC74VHCV373FK Datasheet, PDF (1/10 Pages) Toshiba Semiconductor – Octal Schmitt D-Type Latch with 3-State Output

TC74VHCV373FT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHCV373FT,TC74VHCV373FK
Octal Schmitt D-Type Latch with 3-State Output
The TC74VHCV373 is an advanced high speed CMOS OCTAL
LATCH with 3-STATE OUTPUT fabricated with silicon gate
CMOS technology.
It achieves the high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power
dissipation.
This 8-bit D-type latch is controlled by a latch enable input (LE)
and an output enable input ( OE ).
When the OE input is high, the eight outputs are in a high
impedance state.
Input pin have hysteresis between the positive-going and
negative-going thresholds. Thus the TC74VHCV373 are capable
of squaring up transitions of slowly changing input signals and
provides an improved noise immunity.
Input protection and output circuit ensure that 0 to 5.5 V can be
applied to the input and output ^(Note) pins without regard to the
supply voltage. These structure prevents device destruction due
to mismatched supply and input/output voltages such as battery
back up, hot board insertion, etc.
Note: Output in off-state
Features
• High speed: t_pd = 5.4 ns (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 2 μA (max) at Ta = 25°C
• Wide operating voltage range: V_{CC (opr)} = 1.8 V to 5.5 V
• Ouput current: |I_OH|/I_OL = 16 mA (min) (V_CC = 4.5 V)
• Available in TSSOP and VSSOP (US)
• Power-down protection provided on all inputs and outputs
• Pin and function compatible with the 74 series
(74AC/VHC/HC/F/ALS/LS etc.) 373 typ
TC74VHCV373FT
TC74VHCV373FK
Weight
TSSOP20-P-0044-0.65A
VSSOP20-P-0030-0.50
: 0.08 g ( typ.)
: 0.03 g ( typ.)
1
2010-07-28