TC74VHCT367AF_07 Datasheet, PDF (1/8 Pages) Toshiba Semiconductor – Hex Bus Buffer

TC74VHCT367AF/AFN/AFT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHCT367AF,TC74VHCT367AFN,TC74VHCT367AFT
Hex Bus Buffer
TC74VHCT367AF/AFN/AFT Non-Inverted,
3-State Outputs
The TC74VHCT367A is advanced high speed CMOS HEX BUS
BUFFERs fabricated with silicon gate C²MOS technology.
They achieve the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
They contain six buffers ;four buffers are controlled by an
enable input ( G1 ), and the other two buffers are controlled by
another enable input ( G2 ). The outputs of each buffer group are
enabled when G1 and/or G2 inputs are held low; if held high,
these outputs are in a high impedance state.
The TC74VHCT367A is a non-inverting output type.
Input protection and output circuit ensure that 0 to 5.5 V can
be applied to the input and output ^(Note) pins without regard to
the supply voltage. These structure prevents device destruction
due to mismatched supply and input/output voltages such as
battery back up, hot board insertion, etc.
Note: Output in off-state
Features
• High speed: t_pd = 4.7 ns (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• Compatible with TTL outputs: V_IL = 0.8 V (max)
V_IH = 2.0 V (min)
• Power down protection is provided on all inputs and outputs.
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Low noise: V_OLP = 0.8 V (max)
• Pin and function compatible with the 74ALS367.
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74VHCT367AF
TC74VHCT367AFN
TC74VHCT367AFT
Weight
SOP16-P-300-1.27A
SOL16-P-150-1.27
TSSOP16-P-0044-0.65A
: 0.18 g (typ.)
: 0.13 g (typ.)
: 0.06 g (typ.)
1
2007-10-01