TC74VHCT245AF_07 Datasheet, PDF (1/9 Pages) Toshiba Semiconductor – Octal Bus Transceiver

TC74VHCT245AF/AFT/AFK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHCT245AF,TC74VHCT245AFT,TC74VHCT245AFK
Octal Bus Transceiver
The TC74VHCT245A is an advanced high speed CMOS OCTAL
BUS TRANSCEIVER fabricated with silicon gate C²MOS
technology. It achieves the high speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the CMOS
low power dissipation.
It is intended for two-way asynchronous communication
between data busses. The direction of data transmission is
determined by the level of the DIR input.
The enable input ( G ) can be used to disable the device so that
the busses are effectively isolated.
The input voltage are compatible with TTL output voltage.
This device may be used as a level converter for interfacing 3.3
V to 5 V system.
Input protection and output circuit ensure that 0 to 5.5 V can
be applied to the input and output ^(Note) pins without regard to
the supply voltage. These structure prevents device destruction
due to mismatched supply and input/output voltages such as
battery back up, hot board insertion, etc.
Note: Output in off-state
Features (Note)
• High speed: t_pd = 4.9 ns (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• Compatible with TTL outputs: V_IL = 0.8 V (max)
V_IH = 2.0 V (min)
• Power down protection is provided on all inputs and outputs
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Low noise: V_OLP = 1.6 V (max)
• Pin and function compatible with the 74 series
(74AC/HC/F/ALS/LS etc.) 245 type.
Note:
Do not apply a signal to any bus terminal when it is in
the output mode. Damage may result.
All floating (high impedance) bus terminals must
have their input levels fixed by means of pull up or
pull down resistors.
TC74VHCT245AF
TC74VHCT245AFT
TC74VHCT245AFK
Weight
SOP20-P-300-1.27A : 0.22 g (typ.)
TSSOP20-P-0044-0.65A : 0.08 g (typ.)
VSSOP20-P-0030-0.50 : 0.03 g (typ.)
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2007-10-01