TC74VHC373F_07 Datasheet, PDF (1/10 Pages) Toshiba Semiconductor – Octal D-Type Latch with 3-State Output

TC74VHC373F/FT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHC373F,TC74VHC373FT,TC74VHC373FK
Octal D-Type Latch with 3-State Output
The TC74VHC373 is an advanced high speed CMOS OCTAL
LATCH with 3-STATE OUTPUT fabricated with silicon gate
C²MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
This 8-bit D-type latch is controlled by a latch enable input
(LE) and an output enable input ( OE ).
When the OE input is high, the eight outputs are in a high
impedance state.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
Features
• High speed: t_pd = 5.0 ns (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Power down protection is provided on all inputs.
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Wide operating voltage range: V_{CC (opr)} = 2 to 5.5 V
• Low noise: V_OLP = 0.9 V (max)
• Pin and function compatible with 74ALS373
TC74VHC373F
TC74VHC373FT
TC74VHC373FK
Weight
SOP20-P-300-1.27A
TSSOP20-P-0044-0.65A
VSSOP20-P-0030-0.50
: 0.22 g (typ.)
: 0.08 g (typ.)
: 0.03 g (typ.)
1
2007-10-01