TC74VCX162843FT_07 Datasheet, PDF (1/12 Pages) Toshiba Semiconductor – Low-Voltage 18-Bit D-Type Latch with 3.6-V Tolerant Inputs and Outputs

TC74VCX162843FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VCX162843FT
Low-Voltage 18-Bit D-Type Latch with 3.6-V Tolerant Inputs and Outputs
The TC74VCX162843FT is a high-performance CMOS 18-bit
D-typr latch. Designed for use in 1.8-V, 2.5-V or 3.3-V systems, it
achieves high-speed operation while maintaining the CMOS low
power dissipation.
It is also designed with overvoltage tolerant inputs and outputs
up to 3.6 V.
The TC74VCX162843FT can be used as two 9-bit latches or
one 18-bit latch. The 18 latches are transparent D-type latches.
The device has noninverting data (D) inputs and provides true
data at its outputs. While the latch-enable (1LE or 2LE) input is
high, the Q outputs of the corresponding 9-bit latch follow the D
Weight: 0.25 g (typ.)
inputs. When LE is taken low, the Q outputs are latched at the
levels set up at the D inputs. CLR and PR are independent of the CK and are accomplished by setting the
appropriate input low. When the OE input is high, the outputs are in a high-impedance state. This device is
designed to be used with 3-state memory address drivers, etc.
The 26-Ω series resistor helps reducing output overshoot and undershoot without external resistor.
All inputs are equipped with protection circuits against static discharge.
Features
• 26-Ω series resistors on outputs
• Low-voltage operation: V_CC = 1.8 to 3.6 V
• High-speed operation: t_pd = 3.9 ns (max) (V_CC = 3.0 to 3.6 V)
: t_pd = 5.1 ns (max) (V_CC = 2.3 to 2.7 V)
: t_pd = 9.8 ns (max) (V_CC = 1.8 V)
• Output current: I_OH/I_OL = ±12 mA (min) (V_CC = 3.0 V)
: I_OH/I_OL = ±8 mA (min) (V_CC = 2.3 V)
: I_OH/I_OL = ±4 mA (min) (V_CC = 1.8 V)
• Latch-up performance: −300 mA
• ESD performance: Machine model ≥ ±200 V
Human body model ≥ ±2000 V
• Package: TSSOP
• 3.6-V tolerant function and power-down protection provided on all inputs and outputs
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2007-10-19