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TC74VCX138FT_07 Datasheet, PDF (1/11 Pages) Toshiba Semiconductor – Low Voltage 3-to-8 Line Decoder with 3.6 V Tolerant Inputs and Outputs
TC74VCX138FT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VCX138FT, TC74VCX138FK
Low Voltage 3-to-8 Line Decoder with 3.6 V Tolerant Inputs and Outputs
The TC74VCX138 is a high performance CMOS 3-to-8 decoder
which is guaranteed to operate from 1.2-V to 3.6-V. Designed for
use in 1.5 V, 1.8 V, 2.5 V or 3.3 V systems, it achieves high speed
operation while maintaining the CMOS low power dissipation.
It is also designed with over voltage tolerant inputs and
outputs up to 3.6 V.
When the device is enabled, 3 binary select inputs (A, B and C)
determine which one of the outputs (Y0 - Y0) will go low.
When enable input G1 is held low or either G2A or G2B is held
high, decoding function is inhibited and all outputs go high.
G1, G2A and G2B inputs are provided to ease cascade
connection and for use as an address decoder for memory
systems.
All inputs are equipped with protection circuits against static
discharge.
Features
• Low voltage operation: VCC = 1.2~3.6 V
• High speed operation: tpd = 3.5 ns (max) (VCC = 3.0~3.6 V)
tpd = 4.1 ns (max) (VCC = 2.3~2.7 V)
tpd = 8.2 ns (max) (VCC = 1.65~1.95 V)
tpd = 16.4 ns (max) (VCC = 1.4~1.6 V)
tpd = 41.0 ns (max) (VCC = 1.2 V)
• 3.6 V tolerant inputs and outputs.
• Output current: IOH/IOL = ±24 mA (min) (VCC = 3.0 V)
IOH/IOL = ±18 mA (min) (VCC = 2.3 V)
IOH/IOL = ±6 mA (min) (VCC = 1.65 V)
IOH/IOL = ±2 mA (min) (VCC = 1.4V)
• Latch-up performance: −300 mA
• ESD performance: Machine model ≥ ±200 V
Human body model ≥ ±2000 V
• Package: TSSOP and VSSOP (US)
• Power down protection is provided on all inputs and outputs.
TC74VHC138F
TC74VCX138FK
Weight
TSSOP16-P-0044-0.65A
VSSOP16-P-0030-0.50
: 0.06 g (typ.)
: 0.02 g (typ.)
1
2007-10-19