TC74LCX138F_07 Datasheet, PDF (1/11 Pages) Toshiba Semiconductor – Low-Voltage 3-to-8 Line Decoder with 5-V Tolerant Inputs and Outputs

TC74LCX138F/FN/FT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74LCX138F,TC74LCX138FN,TC74LCX138FT,TC74LCX138FK
Low-Voltage 3-to-8 Line Decoder with 5-V Tolerant Inputs and Outputs
The TC74LCX138 is a high-performance CMOS 3-to-8 decoder.
Designed for use in 3.3-V systems, it achieves high-speed
operation while maintaining the CMOS low-power dissipation.
The device is designed for low-voltage (3.3 V) V_CC applications,
but it could be used to interface to 5-V supply environment for
inputs.
When the device is enabled, 3 binary select inputs (A, B and C)
determine which one of the outputs ( Y0 - Y7 ) will go low.
When enable input G1 is held low or either G2A or G2B is
held high, decoding function is inhibited and all outputs go high.
G1, G2A , and G2B inputs are provided to ease cascade
connection and for use as an address decoder for memory
systems.
All inputs are equipped with protection circuits against static
discharge.
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74LCX138F
TC74LCX138FN
Features
• Low-voltage operation: V_CC = 2.0 to 3.6 V
• High-speed operation: t_pd = 6.0 ns (max) (V_CC = 3.0 to 3.6 V)
• Ouput current: |I_OH|/I_OL = 24 mA (min) (V_CC = 3.0 V)
• Latch-up performance: −500 mA
• Available in JEDEC SOP, JEITA SOP, TSSOP and
VSSOP (US)
• Power-down protection provided on all inputs and outputs
• Pin and function compatible with the 74 series
(74AC/VHC/HC/F/ALS/LS etc.) 138 type
TC74LCX138FT
TC74LCX138FK
Weight
SOP16-P-300-1.27A
SOL16-P-150-1.27
TSSOP16-P-0044-0.65A
VSSOP16-P-0030-0.50
: 0.18 g (typ.)
: 0.12 g (typ.)
: 0.06 g (typ.)
: 0.02 g (typ.)
1
2007-10-19