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TC74HCT573AP_07 Datasheet, PDF (1/7 Pages) Toshiba Semiconductor – Octal D-Type Latch with 3-State Output
TC74HCT573AP/AF
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HCT573AP,TC74HCT573AF
Octal D-Type Latch with 3-State Output
The TC74HCT573A is a high speed CMOS OCTAL LATCH
with 3-STATE OUTPUT fabricated with silicon gate C2MOS
technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
Its inputs are compatible with TTL, NMOS, and CMOS output
voltage levels.
Its 8-bit D-type latch is controlled by a latch enable input (LE)
and an output enable input ( OE ).
When the OE input is high, the eight outputs are in a high
impedance state.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
• High speed: tpd = 18 ns (typ.) at VCC = 5 V
• Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
• Compatible with TTL outputs: VIL = 0.8 V (max)
VIH = 2.0 V (min)
• Output drive capability: 15 LSTTL loads
• Symmetrical output impedance: |IOH| = IOL = 6 mA (min)
• Balanced propagation delays: tpLH ∼− tpHL
• Pin and function compatible with 74LS573
Pin Assignment
TC74HCT573AP
TC74HCT573AF
Weight
DIP20-P-300-2.54A
SOP20-P-300-1.27A
: 1.30 g (typ.)
: 0.22 g (typ.)
1
2007-10-01