TC74HC670AP_07 Datasheet, PDF (1/10 Pages) Toshiba Semiconductor – CMOS Digital Integrated Circuit Silicon Monolithic 4 Word × 4 Bit Register File (3-state)

TC74HC670AP/AF
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC670AP,TC74HC670AF
4 Word × 4 Bit Register File (3-state)
The TC74HC670A is a high speed 4-WORD_S × 4-BIT_S
REGISTER FILE fabricated with silicon gate C²MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
The register file is organized as 4 words of 4 bits each.
Separate read and write address inputs (RA, RB, and WA, WB)
and enable inputs ( RE , WE ) are available permitting
simultaneous writing into one word location and reading from
another location.
Four data inputs (D0~D3) are provided to store the 4-bit words.
The write address inputs (WA, WB) determine the location of
the stored word in the register. When write Enable ( WE ) is held
low, the data is entered into addressed location. When WE is
held high, data and address inputs are inhibited. The data
acquisition from the four registers is made possible by the read
address inputs (RA, RB) when the Read Enable ( RE ) is held low.
When RE is held high the data outputs are in the high impedance
state.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
• High speed: t_pd = 23 ns (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |I_OH| = I_OL = 4 mA (min)
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Wide operating voltage range: V_CC (opr) = 2 to 6 V
• Pin and function compatible with 74LS670
Pin Assignment
TC74HC670AP
TC74HC670AF
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
: 1.00 g (typ.)
: 0.18 g (typ.)
1
2007-10-01