TC74HC595AP_07 Datasheet, PDF (1/11 Pages) Toshiba Semiconductor – CMOS Digital Integrated Circuit Silicon Monolithic 8-Bit Shift Register/Latch (3-state)

TC74HC595AP/AF/AFN
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC595AP,TC74HC595AF,TC74HC595AFN
8-Bit Shift Register/Latch (3-state)
The TC74HC595A is a high speed 8-BIT SHIFT
REGISTER/LATCH fabricated with silicon gate C2MOS
technology.
It achieve the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
The TC74HC595A contains an 8-bit static shift register which
feeds an 8-bit storage register.
Shift operation is accomplished on the positive going transition
of the SCK input. The output register is loaded with the contents
of the shift register on the positive going transition of the RCK
input. Since RCK and SCK signal are independent, parallel
outputs can be held stable during the shift operation.
And, since the parallel outputs are 3-state, it can be directly
connected to 8-bit bus. This register can be used in
serial-to-parallel conversion, data receivers, etc.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
• High speed: f_max = 55 MHz (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Output drive capability: 15 LSTTL loads for QA to QH
10 LSTTL loads for QH’
• Symmetrical output impedance: |I_OH| = I_OL = 6 mA (min)
For QA to QH
|I_OH| = I_OL = 4 mA (min)
For QH’
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Wide operating voltage range: V_CC (opr) = 2 to 6 V
• Pin and function compatible with 74LS595
Pin Assignment
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74HC595AP
TC74HC595AF
TC74HC595AFN
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
SOL16-P-150-1.27
: 1.00 g (typ.)
: 0.18 g (typ.)
: 0.13 g (typ.)
1
2007-10-01